[coreboot-gerrit] Change in coreboot[master]: google/caroline: Add missing audio codec info

Matt DeVillier (Code Review) gerrit at coreboot.org
Tue Jul 24 21:16:47 CEST 2018


Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/27626


Change subject: google/caroline: Add missing audio codec info
......................................................................

google/caroline: Add missing audio codec info

Add audio codec definitions in devicetree, which were accidentally
dropped when upstreaming

Test: build/boot Caroline with GalliumOS 3.0a2, verify working audio.

Change-Id: I707b93c83f773cde2108b75ec550a15e5566d974
Signed-off-by: Matt DeVillier <matt.devillier at gmail.com>
---
M src/mainboard/google/glados/variants/caroline/devicetree.cb
1 file changed, 35 insertions(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/27626/1

diff --git a/src/mainboard/google/glados/variants/caroline/devicetree.cb b/src/mainboard/google/glados/variants/caroline/devicetree.cb
index 9ada5c5..a040714 100644
--- a/src/mainboard/google/glados/variants/caroline/devicetree.cb
+++ b/src/mainboard/google/glados/variants/caroline/devicetree.cb
@@ -226,7 +226,41 @@
 		device pci 17.0 off end # SATA
 		device pci 19.0 on  end # UART #2
 		device pci 19.1 off end # I2C #5
-		device pci 19.2 on  end # I2C #4
+		device pci 19.2 on
+			chip drivers/i2c/nau8825
+				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F10_IRQ)"
+				register "jkdet_enable" = "1"
+				register "jkdet_pull_enable" = "0"   # R389
+				register "jkdet_polarity" = "1"      # ActiveLow
+				register "vref_impedance" = "2"      # 125kOhm
+				register "micbias_voltage" = "6"     # 2.754
+				register "sar_threshold_num" = "4"
+				register "sar_threshold[0]" = "0x0c"
+				register "sar_threshold[1]" = "0x1c"
+				register "sar_threshold[2]" = "0x38"
+				register "sar_threshold[3]" = "0x60"
+				register "sar_hysteresis" = "1"
+				register "sar_voltage" = "0"          # VDDA
+				register "sar_compare_time" = "0"     # 500ns
+				register "sar_sampling_time" = "0"    # 2us
+				register "short_key_debounce" = "2"   # 100ms
+				register "jack_insert_debounce" = "7" # 512ms
+				register "jack_eject_debounce" = "7"  # 512ms
+				device i2c 1a on end
+			end
+			chip drivers/i2c/generic
+				register "hid" = ""INT343B""
+				register "desc" = ""SSM4567 Left Speaker Amp""
+				register "uid" = "0"
+				device i2c 34 on end
+			end
+			chip drivers/i2c/generic
+				register "hid" = ""INT343B""
+				register "desc" = ""SSM4567 Right Speaker Amp""
+				register "uid" = "1"
+				device i2c 35 on end
+			end
+		end # I2C #4
 		device pci 1c.0 on
 			chip drivers/intel/wifi
 				register "wake" = "GPE0_DW0_16"

-- 
To view, visit https://review.coreboot.org/27626
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I707b93c83f773cde2108b75ec550a15e5566d974
Gerrit-Change-Number: 27626
Gerrit-PatchSet: 1
Gerrit-Owner: Matt DeVillier <matt.devillier at gmail.com>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20180724/3d06c56c/attachment.html>


More information about the coreboot-gerrit mailing list