[coreboot-gerrit] Change in coreboot[master]: cpu/intel/model_1067x: Configure IA32_FEATURE_CONTROL for SMRR

[Arthur Heymans (Code Review)]

Hello build bot (Jenkins), 

I'd like you to reexamine a change. Please visit

    https://review.coreboot.org/27586

to look at the new patch set (#2).

Change subject: cpu/intel/model_1067x: Configure IA32_FEATURE_CONTROL for SMRR
......................................................................

cpu/intel/model_1067x: Configure IA32_FEATURE_CONTROL for SMRR

The SMRR enable bit and lock bit in IA32_FEATURE_CONTROL need to be set before
writing to MSR_SMRR_PHYSBASE and MSR_SMRR_PHYSMASK of model_1067x and model_6fx.
Therefore configuring IA32_FEATURE_CONTROL needs to be done early on these
CPUs.

This change takes away the possibility to not lock VMX on these CPU's as this is
need for SMRR MSR to work.

Change-Id: Ia85602e75385e24ebded75e6e6dd38ccc969a76b
Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
M src/cpu/intel/common/common_init.c
M src/cpu/intel/model_1067x/Kconfig
M src/cpu/intel/model_1067x/model_1067x_init.c
M src/cpu/intel/model_1067x/mp_init.c
M src/cpu/intel/model_6fx/Kconfig
M src/cpu/intel/model_6fx/model_6fx_init.c
6 files changed, 27 insertions(+), 2 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/27586/2
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: Ia85602e75385e24ebded75e6e6dd38ccc969a76b
Gerrit-Change-Number: 27586
Gerrit-PatchSet: 2
Gerrit-Owner: Arthur Heymans <arthur at aheymans.xyz>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
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