[coreboot-gerrit] Change in coreboot[master]: cavium/bdk: Fix coverity and remove hardcoded DRAM speed

[Patrick Rudolph (Code Review)]

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/27452


Change subject: cavium/bdk: Fix coverity and remove hardcoded DRAM speed
......................................................................

cavium/bdk: Fix coverity and remove hardcoded DRAM speed

* Fix CID1393963 (Uninitialized variables)
* Comment in working code
* Remove workaround to limit DDR speed

Change-Id: I96289da43c1018c2fdf9d013ce7f21d7511ba595
Signed-off-by: Patrick Rudolph <patrick.rudolph at 9elements.com>
---
M src/mainboard/cavium/cn8100_sff_evb/bdk_devicetree.c
M src/vendorcode/cavium/bdk/libdram/dram-spd.c
2 files changed, 5 insertions(+), 4 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/27452/1

diff --git a/src/mainboard/cavium/cn8100_sff_evb/bdk_devicetree.c b/src/mainboard/cavium/cn8100_sff_evb/bdk_devicetree.c
index 7bc04ce..8775886 100644
--- a/src/mainboard/cavium/cn8100_sff_evb/bdk_devicetree.c
+++ b/src/mainboard/cavium/cn8100_sff_evb/bdk_devicetree.c
@@ -90,7 +90,6 @@
 {"MULTI-NODE", "0"},
 {"QLM-AUTO-CONFIG", "0"},
 {"QLM-DIP-AUTO-CONFIG", "1"},
-{"DDR-SPEED.N0", "1333"},
 {"DDR-CONFIG-SPD-ADDR.DIMM0.LMC0", "0x1050"},
 {"USB-PWR-GPIO.N0.PORT0", "12"},
 {"USB-PWR-GPIO-POLARITY.N0.PORT0", "0"},
diff --git a/src/vendorcode/cavium/bdk/libdram/dram-spd.c b/src/vendorcode/cavium/bdk/libdram/dram-spd.c
index 6498b85..329ae98 100644
--- a/src/vendorcode/cavium/bdk/libdram/dram-spd.c
+++ b/src/vendorcode/cavium/bdk/libdram/dram-spd.c
@@ -549,15 +549,17 @@
     int dimm_speed[8], dimm_count = 0;
     int dimms_per_lmc = 0;
 
+    memset (dimm_speed, 0, sizeof(dimm_speed));
+
     for (lmc = 0; lmc < 4; lmc++) {
         for (dimm = 0; dimm < DDR_CFG_T_MAX_DIMMS; dimm++) {
             const dimm_config_t *dimm_config = &ddr_config[lmc].dimm_config_table[dimm];
-            if (/*dimm_config->spd_addr ||*/ dimm_config->spd_ptr)
+            if (dimm_config->spd_addr || dimm_config->spd_ptr)
             {
                 speed = (ddr_type == DDR4_DRAM)
                     ? get_ddr4_spd_speed(node, dimm_config)
                     : get_ddr3_spd_speed(node, dimm_config);
-                //printf("N%d.LMC%d.DIMM%d: SPD speed %d\n", node, lmc, dimm, speed);
+                printf("N%d.LMC%d.DIMM%d: SPD speed %d\n", node, lmc, dimm, speed);
                 dimm_speed[dimm_count] = speed;
                 dimm_count++;
                 if (lmc == 0)
@@ -596,6 +598,6 @@
     ret_speed = mts_to_hertz(speed);
 
  finish_up:
-    //printf("N%d: Returning default SPD speed %d\n", node, ret_speed);
+    printf("N%d: Returning default SPD speed %d\n", node, ret_speed);
     return ret_speed;
 }

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I96289da43c1018c2fdf9d013ce7f21d7511ba595
Gerrit-Change-Number: 27452
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Rudolph <patrick.rudolph at 9elements.com>
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