[coreboot-gerrit] Change in coreboot[master]: soc/sifive: driver for otp memory

Wed Jul 11 15:17:26 CEST 2018

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/27435 )

Change subject: soc/sifive: driver for otp memory
......................................................................

Patch Set 1:

(31 comments)

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c
File src/soc/sifive/fu540/otp.c:

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c@31
PS1, Line 31:         u32 pa;     /* Address input */
code indent should use tabs where possible

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c@31
PS1, Line 31:         u32 pa;     /* Address input */
please, no spaces at the start of a line

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c@32
PS1, Line 32:         u32 paio;   /* Program address input */
code indent should use tabs where possible

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c@32
PS1, Line 32:         u32 paio;   /* Program address input */
please, no spaces at the start of a line

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c@33
PS1, Line 33:         u32 pas;    /* Program redundancy cell selection input */
code indent should use tabs where possible

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c@33
PS1, Line 33:         u32 pas;    /* Program redundancy cell selection input */
please, no spaces at the start of a line

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c@34
PS1, Line 34:         u32 pce;    /* OTP Macro enable input */
code indent should use tabs where possible

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c@34
PS1, Line 34:         u32 pce;    /* OTP Macro enable input */
please, no spaces at the start of a line

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c@35
PS1, Line 35:         u32 pclk;   /* Clock input */
code indent should use tabs where possible

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c@35
PS1, Line 35:         u32 pclk;   /* Clock input */
please, no spaces at the start of a line

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c@36
PS1, Line 36:         u32 pdin;   /* Write data input */
code indent should use tabs where possible

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c@36
PS1, Line 36:         u32 pdin;   /* Write data input */
please, no spaces at the start of a line

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c@37
PS1, Line 37:         u32 pdout;  /* Read data output */
code indent should use tabs where possible

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c@37
PS1, Line 37:         u32 pdout;  /* Read data output */
please, no spaces at the start of a line

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c@38
PS1, Line 38:         u32 pdstb;  /* Deep standby mode enable input (active low) */
code indent should use tabs where possible

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c@38
PS1, Line 38:         u32 pdstb;  /* Deep standby mode enable input (active low) */
please, no spaces at the start of a line

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c@39
PS1, Line 39:         u32 pprog;  /* Program mode enable input */
code indent should use tabs where possible

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c@39
PS1, Line 39:         u32 pprog;  /* Program mode enable input */
please, no spaces at the start of a line

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c@40
PS1, Line 40:         u32 ptc;    /* Test column enable input */
code indent should use tabs where possible

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c@40
PS1, Line 40:         u32 ptc;    /* Test column enable input */
please, no spaces at the start of a line

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c@41
PS1, Line 41:         u32 ptm;    /* Test mode enable input */
code indent should use tabs where possible

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c@41
PS1, Line 41:         u32 ptm;    /* Test mode enable input */
please, no spaces at the start of a line

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c@42
PS1, Line 42:         u32 ptm_rep;/* Repair function test mode enable input */
code indent should use tabs where possible

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c@42
PS1, Line 42:         u32 ptm_rep;/* Repair function test mode enable input */
please, no spaces at the start of a line

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c@43
PS1, Line 43:         u32 ptr;    /* Test row enable inpu */
code indent should use tabs where possible

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c@43
PS1, Line 43:         u32 ptr;    /* Test row enable inpu */
please, no spaces at the start of a line

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c@44
PS1, Line 44:         u32 ptrim;  /* Repair function enable input */
code indent should use tabs where possible

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c@44
PS1, Line 44:         u32 ptrim;  /* Repair function enable input */
please, no spaces at the start of a line

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c@45
PS1, Line 45:         u32 pwe;    /* Write enable input (defines program cycle) */
code indent should use tabs where possible

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c@45
PS1, Line 45:         u32 pwe;    /* Write enable input (defines program cycle) */
please, no spaces at the start of a line

https://review.coreboot.org/#/c/27435/1/src/soc/sifive/fu540/otp.c@63
PS1, Line 63: 	// adress to read
'adress' may be misspelled - perhaps 'address'?

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: I14b010ad9958931e0a98a76f76090fd7c66f19a0
Gerrit-Change-Number: 27435
Gerrit-PatchSet: 1
Gerrit-Owner: Philipp Hug <philipp at hug.cx>
Gerrit-CC: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Comment-Date: Wed, 11 Jul 2018 13:17:26 +0000
Gerrit-HasComments: Yes
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