[coreboot-gerrit] Change in coreboot[master]: src: Use "foo *bar" instead of "foo* bar"

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26942 )

Change subject: src: Use "foo *bar" instead of "foo* bar"
......................................................................


Patch Set 14:

(73 comments)

https://review.coreboot.org/#/c/26942/14/src/cpu/amd/family_10h-family_15h/init_cpus.c
File src/cpu/amd/family_10h-family_15h/init_cpus.c:

https://review.coreboot.org/#/c/26942/14/src/cpu/amd/family_10h-family_15h/init_cpus.c@380
PS14, Line 380: 	void *lower_stack_region_boundary = (void *)(bsp_stack_region_lower_boundary - max_ap_stack_region_size);
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h
File src/device/oprom/yabel/compat/of.h:

https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@38
PS14, Line 38: #define p32cast (int) (unsigned long) (void *)
Macros with complex values should be enclosed in parentheses


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@53
PS14, Line 53: phandle_t of_peer(phandle_t);
function definition argument 'phandle_t' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@54
PS14, Line 54: phandle_t of_child(phandle_t);
function definition argument 'phandle_t' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@55
PS14, Line 55: phandle_t of_parent(phandle_t);
function definition argument 'phandle_t' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@56
PS14, Line 56: int of_getprop(phandle_t, const char *, void *, int);
function definition argument 'phandle_t' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@56
PS14, Line 56: int of_getprop(phandle_t, const char *, void *, int);
function definition argument 'const char *' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@56
PS14, Line 56: int of_getprop(phandle_t, const char *, void *, int);
function definition argument 'void *' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@56
PS14, Line 56: int of_getprop(phandle_t, const char *, void *, int);
function definition argument 'int' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@57
PS14, Line 57: void *of_call_method_3(const char *, ihandle_t, int);
function definition argument 'const char *' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@57
PS14, Line 57: void *of_call_method_3(const char *, ihandle_t, int);
function definition argument 'ihandle_t' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@57
PS14, Line 57: void *of_call_method_3(const char *, ihandle_t, int);
function definition argument 'int' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@60
PS14, Line 60: ihandle_t of_open(const char *);
function definition argument 'const char *' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@62
PS14, Line 62: int of_read(ihandle_t, void *, int);
function definition argument 'ihandle_t' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@62
PS14, Line 62: int of_read(ihandle_t, void *, int);
function definition argument 'void *' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@62
PS14, Line 62: int of_read(ihandle_t, void *, int);
function definition argument 'int' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@63
PS14, Line 63: int of_write(ihandle_t, void *, int);
function definition argument 'ihandle_t' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@63
PS14, Line 63: int of_write(ihandle_t, void *, int);
function definition argument 'void *' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@63
PS14, Line 63: int of_write(ihandle_t, void *, int);
function definition argument 'int' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@64
PS14, Line 64: int of_seek(ihandle_t, int, int);
function definition argument 'ihandle_t' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@64
PS14, Line 64: int of_seek(ihandle_t, int, int);
function definition argument 'int' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@64
PS14, Line 64: int of_seek(ihandle_t, int, int);
function definition argument 'int' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@66
PS14, Line 66: void *of_claim(void *, unsigned int, unsigned int);
function definition argument 'void *' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@66
PS14, Line 66: void *of_claim(void *, unsigned int, unsigned int);
function definition argument 'unsigned int' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@66
PS14, Line 66: void *of_claim(void *, unsigned int, unsigned int);
function definition argument 'unsigned int' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@67
PS14, Line 67: void of_release(void *, unsigned int);
function definition argument 'void *' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@67
PS14, Line 67: void of_release(void *, unsigned int);
function definition argument 'unsigned int' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@70
PS14, Line 70: void *of_set_callback(void *);
function definition argument 'void *' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@72
PS14, Line 72: int vpd_read(unsigned int, unsigned int, char *);
function definition argument 'unsigned int' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@72
PS14, Line 72: int vpd_read(unsigned int, unsigned int, char *);
function definition argument 'unsigned int' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@72
PS14, Line 72: int vpd_read(unsigned int, unsigned int, char *);
function definition argument 'char *' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@73
PS14, Line 73: int vpd_write(unsigned int, unsigned int, char *);
function definition argument 'unsigned int' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@73
PS14, Line 73: int vpd_write(unsigned int, unsigned int, char *);
function definition argument 'unsigned int' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@73
PS14, Line 73: int vpd_write(unsigned int, unsigned int, char *);
function definition argument 'char *' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@74
PS14, Line 74: int write_mm_log(char *, unsigned int, unsigned short);
function definition argument 'char *' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@74
PS14, Line 74: int write_mm_log(char *, unsigned int, unsigned short);
function definition argument 'unsigned int' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/device/oprom/yabel/compat/of.h@74
PS14, Line 74: int write_mm_log(char *, unsigned int, unsigned short);
function definition argument 'unsigned short' should also have an identifier name


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h
File src/northbridge/amd/amdmct/mct_ddr3/mct_d.h:

https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h@1058
PS14, Line 1058: void read_dqs_receiver_enable_control_registers(uint16_t *current_total_delay, uint32_t dev, uint8_t dct, uint8_t dimm, uint32_t index_reg);
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h@1059
PS14, Line 1059: void read_dqs_write_timing_control_registers(uint16_t *current_total_delay, uint32_t dev, uint8_t dct, uint8_t dimm, uint32_t index_reg);
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h@1136
PS14, Line 1136: void write_dqs_receiver_enable_control_registers(uint16_t *current_total_delay, uint32_t dev, uint8_t dct, uint8_t dimm, uint32_t index_reg);
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c
File src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c:

https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c@320
PS14, Line 320: static void read_dqs_write_data_timing_registers(uint16_t *delay, uint32_t dev, uint8_t dct, uint8_t dimm, uint32_t index_reg)
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c@349
PS14, Line 349: static void write_dqs_write_data_timing_registers(uint16_t *delay, uint32_t dev, uint8_t dct, uint8_t dimm, uint32_t index_reg)
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c
File src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c:

https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c@258
PS14, Line 258: void read_dqs_write_timing_control_registers(uint16_t *current_total_delay, uint32_t dev, uint8_t dct, uint8_t dimm, uint32_t index_reg)
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c@285
PS14, Line 285: static void write_dqs_write_timing_control_registers(uint16_t *current_total_delay, uint32_t dev, uint8_t dct, uint8_t dimm, uint32_t index_reg)
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c@317
PS14, Line 317: static void write_write_data_timing_control_registers(uint16_t *current_total_delay, uint32_t dev, uint8_t dct, uint8_t dimm, uint32_t index_reg)
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c@356
PS14, Line 356: void read_dqs_receiver_enable_control_registers(uint16_t *current_total_delay, uint32_t dev, uint8_t dct, uint8_t dimm, uint32_t index_reg)
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c@390
PS14, Line 390: void write_dqs_receiver_enable_control_registers(uint16_t *current_total_delay, uint32_t dev, uint8_t dct, uint8_t dimm, uint32_t index_reg)
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c@427
PS14, Line 427: static void read_dram_phase_recovery_control_registers(uint16_t *current_total_delay, uint32_t dev, uint8_t dct, uint8_t dimm, uint32_t index_reg)
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c@459
PS14, Line 459: static void write_dram_phase_recovery_control_registers(uint16_t *current_total_delay, uint32_t dev, uint8_t dct, uint8_t dimm, uint32_t index_reg)
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c@497
PS14, Line 497: void read_dqs_read_data_timing_registers(uint16_t *delay, uint32_t dev, uint8_t dct, uint8_t dimm, uint32_t index_reg)
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c@531
PS14, Line 531: void write_dqs_read_data_timing_registers(uint16_t *delay, uint32_t dev, uint8_t dct, uint8_t dimm, uint32_t index_reg)
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c
File src/northbridge/amd/amdmct/mct_ddr3/s3utils.c:

https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c@272
PS14, Line 272: static void copy_cbmem_spd_data_to_save_variable(struct amd_s3_persistent_data *persistent_data, uint8_t *restored)
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c@306
PS14, Line 306: void copy_mct_data_to_save_variable(struct amd_s3_persistent_data *persistent_data)
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c@329
PS14, Line 329: 			struct amd_s3_persistent_mct_channel_data *data = &persistent_data->node[node].channel[channel];
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c@597
PS14, Line 597: void restore_mct_data_from_save_variable(struct amd_s3_persistent_data *persistent_data, uint8_t training_only)
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c@611
PS14, Line 611: 				struct amd_s3_persistent_mct_channel_data *data = &persistent_data->node[node].channel[channel];
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c@655
PS14, Line 655: 			struct amd_s3_persistent_mct_channel_data *data = &persistent_data->node[node].channel[channel];
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c@666
PS14, Line 666: 			struct amd_s3_persistent_mct_channel_data *data = &persistent_data->node[node].channel[channel];
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c@722
PS14, Line 722: 			struct amd_s3_persistent_mct_channel_data *data = &persistent_data->node[node].channel[channel];
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c@761
PS14, Line 761: 				struct amd_s3_persistent_mct_channel_data *data = &persistent_data->node[node].channel[channel];
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c@826
PS14, Line 826: 			struct amd_s3_persistent_mct_channel_data *data = &persistent_data->node[node].channel[channel];
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c@871
PS14, Line 871: 			struct amd_s3_persistent_mct_channel_data *data = &persistent_data->node[node].channel[channel];
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c@912
PS14, Line 912: 			struct amd_s3_persistent_mct_channel_data *data = &persistent_data->node[node].channel[channel];
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c@929
PS14, Line 929: 				struct amd_s3_persistent_mct_channel_data *data = &persistent_data->node[node].channel[channel];
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c@967
PS14, Line 967: 			struct amd_s3_persistent_mct_channel_data *data = &persistent_data->node[node].channel[channel];
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c@986
PS14, Line 986: 			struct amd_s3_persistent_mct_channel_data *data = &persistent_data->node[node].channel[channel];
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c@1013
PS14, Line 1013: 			struct amd_s3_persistent_mct_channel_data *data = &persistent_data->node[node].channel[channel];
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c@1037
PS14, Line 1037: 			struct amd_s3_persistent_mct_channel_data *data = &persistent_data->node[node].channel[channel];
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c@1069
PS14, Line 1069: 				struct amd_s3_persistent_mct_channel_data *data = &persistent_data->node[node].channel[channel];
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c@1084
PS14, Line 1084: 			struct amd_s3_persistent_mct_channel_data *data = &persistent_data->node[node].channel[channel];
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/southbridge/amd/sr5650/sr5650.c
File src/southbridge/amd/sr5650/sr5650.c:

https://review.coreboot.org/#/c/26942/14/src/southbridge/amd/sr5650/sr5650.c@35
PS14, Line 35: struct resource *sr5650_retrieve_cpu_mmio_resource() {
open brace '{' following function declarations go on the next line


https://review.coreboot.org/#/c/26942/14/src/southbridge/intel/i82870/ioapic.c
File src/southbridge/intel/i82870/ioapic.c:

https://review.coreboot.org/#/c/26942/14/src/southbridge/intel/i82870/ioapic.c@47
PS14, Line 47: 	volatile uint32_t *pIndexRegister;    /* io apic io memory space command address */
line over 80 characters


https://review.coreboot.org/#/c/26942/14/src/southbridge/intel/i82870/ioapic.c@48
PS14, Line 48: 	volatile uint32_t *pWindowRegister;    /* io apic io memory space data address */
line over 80 characters



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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: I8e4118c5c5d70719ad7dc5f9ff9f86d93fa498ac
Gerrit-Change-Number: 26942
Gerrit-PatchSet: 14
Gerrit-Owner: Elyes HAOUAS <ehaouas at noos.fr>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Comment-Date: Sat, 07 Jul 2018 06:55:31 +0000
Gerrit-HasComments: Yes
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