[coreboot-gerrit] Change in coreboot[master]: nb/intel/i945: Fix allocating the TSEG resource

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/23448


Change subject: nb/intel/i945: Fix allocating the TSEG resource
......................................................................

nb/intel/i945: Fix allocating the TSEG resource

The computation the TSEG size was wrong when computing cbmem_top,
but was correct when allocating resources.

Change-Id: I4e163598752fb6cd036aec229fce439ebad74def
Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
M src/northbridge/intel/i945/i945.h
M src/northbridge/intel/i945/northbridge.c
M src/northbridge/intel/i945/ram_calc.c
3 files changed, 30 insertions(+), 44 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/23448/1

diff --git a/src/northbridge/intel/i945/i945.h b/src/northbridge/intel/i945/i945.h
index 330ace1..5634eb7 100644
--- a/src/northbridge/intel/i945/i945.h
+++ b/src/northbridge/intel/i945/i945.h
@@ -365,6 +365,7 @@
 void dump_mem(unsigned int start, unsigned int end);
 
 u32 decode_igd_memory_size(u32 gms);
+u32 decode_tseg_size(const u8 esmramc);
 
 #endif /* __ACPI__ */
 
diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c
index 57f4388..38fd26e 100644
--- a/src/northbridge/intel/i945/northbridge.c
+++ b/src/northbridge/intel/i945/northbridge.c
@@ -59,8 +59,8 @@
 
 static void pci_domain_set_resources(device_t dev)
 {
-	uint32_t pci_tolm;
-	uint8_t tolud, reg8;
+	uint32_t pci_tolm, tseg_sizek;
+	uint8_t tolud;
 	uint16_t reg16;
 	unsigned long long tomk, tomk_stolen;
 	uint64_t uma_memory_base = 0, uma_memory_size = 0;
@@ -95,31 +95,14 @@
 		uma_memory_size = uma_size * 1024ULL;
 	}
 
-	reg8 = pci_read_config8(dev_find_slot(0, PCI_DEVFN(0, 0)), 0x9e);
-	if (reg8 & 1) {
-		int tseg_size = 0;
-		printk(BIOS_DEBUG, "TSEG decoded, subtracting ");
-		reg8 >>= 1;
-		reg8 &= 3;
-		switch (reg8) {
-		case 0:
-			tseg_size = 1024;
-			break;	/* TSEG = 1M */
-		case 1:
-			tseg_size = 2048;
-			break;	/* TSEG = 2M */
-		case 2:
-			tseg_size = 8192;
-			break;	/* TSEG = 8M */
-		}
+	tseg_sizek = decode_tseg_size(pci_read_config8(dev_find_slot(0,
+					PCI_DEVFN(0, 0)), ESMRAM)) >> 10;
+	printk(BIOS_DEBUG, "TSEG decoded, subtracting ");
+	printk(BIOS_DEBUG, "%dM\n", tseg_sizek >> 10);
+	tomk_stolen -= tseg_sizek;
+	tseg_memory_base = tomk_stolen * 1024ULL;
+	tseg_memory_size = tseg_sizek * 1024ULL;
 
-		printk(BIOS_DEBUG, "%dM\n", tseg_size >> 10);
-		tomk_stolen -= tseg_size;
-
-		/* For reserving TSEG memory in the memory map */
-		tseg_memory_base = tomk_stolen * 1024ULL;
-		tseg_memory_size = tseg_size * 1024ULL;
-	}
 
 	/* The following needs to be 2 lines, otherwise the second
 	 * number is always 0
diff --git a/src/northbridge/intel/i945/ram_calc.c b/src/northbridge/intel/i945/ram_calc.c
index 0c337bb..16993bc 100644
--- a/src/northbridge/intel/i945/ram_calc.c
+++ b/src/northbridge/intel/i945/ram_calc.c
@@ -25,6 +25,24 @@
 #include <cpu/x86/mtrr.h>
 #include <program_loading.h>
 
+/* Decodes TSEG region size to bytes. */
+u32 decode_tseg_size(const u8 esmramc)
+{
+	if (!(esmramc & 1))
+		return 0;
+	switch ((esmramc >> 1) & 3) {
+	case 0:
+		return 1 << 20;
+	case 1:
+		return 2 << 20;
+	case 2:
+		return 8 << 20;
+	case 3:
+	default:
+		die("Bad TSEG setting.\n");
+	}
+}
+
 static uintptr_t smm_region_start(void)
 {
 	uintptr_t tom;
@@ -35,24 +53,8 @@
 	else
 		tom = (pci_read_config8(PCI_DEV(0, 0, 0), TOLUD) & 0xf7) << 24;
 
-	/* if TSEG enabled subtract size */
-	switch (pci_read_config8(PCI_DEV(0, 0, 0), ESMRAM) & 0x07) {
-	case 0x01:
-		/* 1MB TSEG */
-		tom -= 0x100000;
-		break;
-	case 0x03:
-		/* 2MB TSEG */
-		tom -= 0x200000;
-		break;
-	case 0x05:
-		/* 8MB TSEG */
-		tom -= 0x800000;
-		break;
-	default:
-		/* TSEG either disabled or invalid */
-		break;
-	}
+	/* subsctract TSEG size */
+	tom -= decode_tseg_size(pci_read_config8(PCI_DEV(0, 0, 0), ESMRAM));
 	return tom;
 }
 

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I4e163598752fb6cd036aec229fce439ebad74def
Gerrit-Change-Number: 23448
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur at aheymans.xyz>
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