<p>Arthur Heymans has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/23448">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">nb/intel/i945: Fix allocating the TSEG resource<br><br>The computation the TSEG size was wrong when computing cbmem_top,<br>but was correct when allocating resources.<br><br>Change-Id: I4e163598752fb6cd036aec229fce439ebad74def<br>Signed-off-by: Arthur Heymans <arthur@aheymans.xyz><br>---<br>M src/northbridge/intel/i945/i945.h<br>M src/northbridge/intel/i945/northbridge.c<br>M src/northbridge/intel/i945/ram_calc.c<br>3 files changed, 30 insertions(+), 44 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/23448/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/northbridge/intel/i945/i945.h b/src/northbridge/intel/i945/i945.h</span><br><span>index 330ace1..5634eb7 100644</span><br><span>--- a/src/northbridge/intel/i945/i945.h</span><br><span>+++ b/src/northbridge/intel/i945/i945.h</span><br><span>@@ -365,6 +365,7 @@</span><br><span> void dump_mem(unsigned int start, unsigned int end);</span><br><span> </span><br><span> u32 decode_igd_memory_size(u32 gms);</span><br><span style="color: hsl(120, 100%, 40%);">+u32 decode_tseg_size(const u8 esmramc);</span><br><span> </span><br><span> #endif /* __ACPI__ */</span><br><span> </span><br><span>diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c</span><br><span>index 57f4388..38fd26e 100644</span><br><span>--- a/src/northbridge/intel/i945/northbridge.c</span><br><span>+++ b/src/northbridge/intel/i945/northbridge.c</span><br><span>@@ -59,8 +59,8 @@</span><br><span> </span><br><span> static void pci_domain_set_resources(device_t dev)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- uint32_t pci_tolm;</span><br><span style="color: hsl(0, 100%, 40%);">- uint8_t tolud, reg8;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t pci_tolm, tseg_sizek;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint8_t tolud;</span><br><span> uint16_t reg16;</span><br><span> unsigned long long tomk, tomk_stolen;</span><br><span> uint64_t uma_memory_base = 0, uma_memory_size = 0;</span><br><span>@@ -95,31 +95,14 @@</span><br><span> uma_memory_size = uma_size * 1024ULL;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- reg8 = pci_read_config8(dev_find_slot(0, PCI_DEVFN(0, 0)), 0x9e);</span><br><span style="color: hsl(0, 100%, 40%);">- if (reg8 & 1) {</span><br><span style="color: hsl(0, 100%, 40%);">- int tseg_size = 0;</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, "TSEG decoded, subtracting ");</span><br><span style="color: hsl(0, 100%, 40%);">- reg8 >>= 1;</span><br><span style="color: hsl(0, 100%, 40%);">- reg8 &= 3;</span><br><span style="color: hsl(0, 100%, 40%);">- switch (reg8) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 0:</span><br><span style="color: hsl(0, 100%, 40%);">- tseg_size = 1024;</span><br><span style="color: hsl(0, 100%, 40%);">- break; /* TSEG = 1M */</span><br><span style="color: hsl(0, 100%, 40%);">- case 1:</span><br><span style="color: hsl(0, 100%, 40%);">- tseg_size = 2048;</span><br><span style="color: hsl(0, 100%, 40%);">- break; /* TSEG = 2M */</span><br><span style="color: hsl(0, 100%, 40%);">- case 2:</span><br><span style="color: hsl(0, 100%, 40%);">- tseg_size = 8192;</span><br><span style="color: hsl(0, 100%, 40%);">- break; /* TSEG = 8M */</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(120, 100%, 40%);">+ tseg_sizek = decode_tseg_size(pci_read_config8(dev_find_slot(0,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVFN(0, 0)), ESMRAM)) >> 10;</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, "TSEG decoded, subtracting ");</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, "%dM\n", tseg_sizek >> 10);</span><br><span style="color: hsl(120, 100%, 40%);">+ tomk_stolen -= tseg_sizek;</span><br><span style="color: hsl(120, 100%, 40%);">+ tseg_memory_base = tomk_stolen * 1024ULL;</span><br><span style="color: hsl(120, 100%, 40%);">+ tseg_memory_size = tseg_sizek * 1024ULL;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, "%dM\n", tseg_size >> 10);</span><br><span style="color: hsl(0, 100%, 40%);">- tomk_stolen -= tseg_size;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* For reserving TSEG memory in the memory map */</span><br><span style="color: hsl(0, 100%, 40%);">- tseg_memory_base = tomk_stolen * 1024ULL;</span><br><span style="color: hsl(0, 100%, 40%);">- tseg_memory_size = tseg_size * 1024ULL;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span> </span><br><span> /* The following needs to be 2 lines, otherwise the second</span><br><span> * number is always 0</span><br><span>diff --git a/src/northbridge/intel/i945/ram_calc.c b/src/northbridge/intel/i945/ram_calc.c</span><br><span>index 0c337bb..16993bc 100644</span><br><span>--- a/src/northbridge/intel/i945/ram_calc.c</span><br><span>+++ b/src/northbridge/intel/i945/ram_calc.c</span><br><span>@@ -25,6 +25,24 @@</span><br><span> #include <cpu/x86/mtrr.h></span><br><span> #include <program_loading.h></span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+/* Decodes TSEG region size to bytes. */</span><br><span style="color: hsl(120, 100%, 40%);">+u32 decode_tseg_size(const u8 esmramc)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ if (!(esmramc & 1))</span><br><span style="color: hsl(120, 100%, 40%);">+ return 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ switch ((esmramc >> 1) & 3) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0:</span><br><span style="color: hsl(120, 100%, 40%);">+ return 1 << 20;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 1:</span><br><span style="color: hsl(120, 100%, 40%);">+ return 2 << 20;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 2:</span><br><span style="color: hsl(120, 100%, 40%);">+ return 8 << 20;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3:</span><br><span style="color: hsl(120, 100%, 40%);">+ default:</span><br><span style="color: hsl(120, 100%, 40%);">+ die("Bad TSEG setting.\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> static uintptr_t smm_region_start(void)</span><br><span> {</span><br><span> uintptr_t tom;</span><br><span>@@ -35,24 +53,8 @@</span><br><span> else</span><br><span> tom = (pci_read_config8(PCI_DEV(0, 0, 0), TOLUD) & 0xf7) << 24;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- /* if TSEG enabled subtract size */</span><br><span style="color: hsl(0, 100%, 40%);">- switch (pci_read_config8(PCI_DEV(0, 0, 0), ESMRAM) & 0x07) {</span><br><span style="color: hsl(0, 100%, 40%);">- case 0x01:</span><br><span style="color: hsl(0, 100%, 40%);">- /* 1MB TSEG */</span><br><span style="color: hsl(0, 100%, 40%);">- tom -= 0x100000;</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 0x03:</span><br><span style="color: hsl(0, 100%, 40%);">- /* 2MB TSEG */</span><br><span style="color: hsl(0, 100%, 40%);">- tom -= 0x200000;</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case 0x05:</span><br><span style="color: hsl(0, 100%, 40%);">- /* 8MB TSEG */</span><br><span style="color: hsl(0, 100%, 40%);">- tom -= 0x800000;</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- default:</span><br><span style="color: hsl(0, 100%, 40%);">- /* TSEG either disabled or invalid */</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(120, 100%, 40%);">+ /* subsctract TSEG size */</span><br><span style="color: hsl(120, 100%, 40%);">+ tom -= decode_tseg_size(pci_read_config8(PCI_DEV(0, 0, 0), ESMRAM));</span><br><span> return tom;</span><br><span> }</span><br><span> </span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/23448">change 23448</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I4e163598752fb6cd036aec229fce439ebad74def </div>
<div style="display:none"> Gerrit-Change-Number: 23448 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> </div>