[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Add Pch iSCLK programming

[Lijian Zhao (Code Review)]

Lijian Zhao has uploaded a new patch set (#2). ( https://review.coreboot.org/23367 )

Change subject: soc/intel/cannonlake: Add Pch iSCLK programming
......................................................................

soc/intel/cannonlake: Add Pch iSCLK programming

In order to reduce BOM cost and board area for imaging solution, the
sensor requires a 19.2/24MHz reference clock from PCH. In addition to
that, having PCH to supply the sensor reference clock will prevent
dependency on CPU power management and also avoid level shifter cost.

Pch iSCLK is only required for CNP-LP with the camera sensor on the 
platform.

BUG=None
TEST=Boot up into OS and read back PCH iSCLK programming through 
iotools.

Change-Id: I28c97a75f2a7f5122a20c8b8f0f2671037a7eca6
Signed-off-by: Lijian Zhao <lijian.zhao at intel.com>
---
M src/soc/intel/cannonlake/chip.h
M src/soc/intel/cannonlake/finalize.c
M src/soc/intel/cannonlake/include/soc/pcr_ids.h
3 files changed, 39 insertions(+), 0 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/23367/2
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I28c97a75f2a7f5122a20c8b8f0f2671037a7eca6
Gerrit-Change-Number: 23367
Gerrit-PatchSet: 2
Gerrit-Owner: Lijian Zhao <lijian.zhao at intel.com>
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