[coreboot-gerrit] Change in coreboot[master]: mainboard/google/fizz: Tune audio i2c parameters

[Shelley Chen (Code Review)]

Shelley Chen has uploaded this change for review. ( https://review.coreboot.org/23359


Change subject: mainboard/google/fizz: Tune audio i2c parameters
......................................................................

mainboard/google/fizz: Tune audio i2c parameters

Tune I2C params for I2C bus 5 to ensure that the frequency does not
exceed 400KHz.

BUG=b:65058277
BRANCH=None
TEST=Measured bus frequency for audio <= 400MHz

Change-Id: I18bca023a6a0fe21e6f46f8688264d3c04d77f25
Signed-off-by: Shelley Chen <shchen at chromium.org>
---
M src/mainboard/google/fizz/devicetree.cb
1 file changed, 11 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/23359/1

diff --git a/src/mainboard/google/fizz/devicetree.cb b/src/mainboard/google/fizz/devicetree.cb
index 81b5dc5..8cf4e52 100644
--- a/src/mainboard/google/fizz/devicetree.cb
+++ b/src/mainboard/google/fizz/devicetree.cb
@@ -247,6 +247,17 @@
 		 .early_init = 1,
 	}"
 
+	# audio
+	register "i2c[5]" = "{
+		 .speed = I2C_SPEED_FAST,
+		 .speed_config[0] = {
+			.speed = I2C_SPEED_FAST,
+			.scl_lcnt = 194,
+			.scl_hcnt = 100,
+			.sda_hold = 36,
+		},
+	}"
+
 	# Must leave UART0 enabled or SD/eMMC will not work as PCI
 	register "SerialIoDevMode" = "{
 		[PchSerialIoIndexI2C0]  = PchSerialIoDisabled,

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I18bca023a6a0fe21e6f46f8688264d3c04d77f25
Gerrit-Change-Number: 23359
Gerrit-PatchSet: 1
Gerrit-Owner: Shelley Chen <shchen at google.com>
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