<p>Shelley Chen has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/23359">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mainboard/google/fizz: Tune audio i2c parameters<br><br>Tune I2C params for I2C bus 5 to ensure that the frequency does not<br>exceed 400KHz.<br><br>BUG=b:65058277<br>BRANCH=None<br>TEST=Measured bus frequency for audio <= 400MHz<br><br>Change-Id: I18bca023a6a0fe21e6f46f8688264d3c04d77f25<br>Signed-off-by: Shelley Chen <shchen@chromium.org><br>---<br>M src/mainboard/google/fizz/devicetree.cb<br>1 file changed, 11 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/23359/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/fizz/devicetree.cb b/src/mainboard/google/fizz/devicetree.cb</span><br><span>index 81b5dc5..8cf4e52 100644</span><br><span>--- a/src/mainboard/google/fizz/devicetree.cb</span><br><span>+++ b/src/mainboard/google/fizz/devicetree.cb</span><br><span>@@ -247,6 +247,17 @@</span><br><span>            .early_init = 1,</span><br><span>    }"</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+   # audio</span><br><span style="color: hsl(120, 100%, 40%);">+       register "i2c[5]" = "{</span><br><span style="color: hsl(120, 100%, 40%);">+          .speed = I2C_SPEED_FAST,</span><br><span style="color: hsl(120, 100%, 40%);">+              .speed_config[0] = {</span><br><span style="color: hsl(120, 100%, 40%);">+                 .speed = I2C_SPEED_FAST,</span><br><span style="color: hsl(120, 100%, 40%);">+                      .scl_lcnt = 194,</span><br><span style="color: hsl(120, 100%, 40%);">+                      .scl_hcnt = 100,</span><br><span style="color: hsl(120, 100%, 40%);">+                      .sda_hold = 36,</span><br><span style="color: hsl(120, 100%, 40%);">+               },</span><br><span style="color: hsl(120, 100%, 40%);">+    }"</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span>    # Must leave UART0 enabled or SD/eMMC will not work as PCI</span><br><span>   register "SerialIoDevMode" = "{</span><br><span>               [PchSerialIoIndexI2C0]  = PchSerialIoDisabled,</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/23359">change 23359</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/23359"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I18bca023a6a0fe21e6f46f8688264d3c04d77f25 </div>
<div style="display:none"> Gerrit-Change-Number: 23359 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Shelley Chen <shchen@google.com> </div>