[coreboot-gerrit] Change in coreboot[master]: mb/hp: Enable additional ports at WWAN slot for Elitebooks

Iru Cai (Code Review) gerrit at coreboot.org
Mon Jan 22 12:52:53 CET 2018


Iru Cai has uploaded this change for review. ( https://review.coreboot.org/23357


Change subject: mb/hp: Enable additional ports at WWAN slot for Elitebooks
......................................................................

mb/hp: Enable additional ports at WWAN slot for Elitebooks

2760p: enable PCIe
8470p: enable mSATA
8460p: enable PCIe, also add comments according to circuit diagram

Change-Id: Ib5209f2dfb249fca5bae89bc6da3b704c8e903dd
Signed-off-by: Iru Cai <mytbk920423 at gmail.com>
---
M src/mainboard/hp/2760p/devicetree.cb
M src/mainboard/hp/8460p/devicetree.cb
M src/mainboard/hp/8460p/romstage.c
M src/mainboard/hp/8470p/devicetree.cb
4 files changed, 17 insertions(+), 15 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/23357/1

diff --git a/src/mainboard/hp/2760p/devicetree.cb b/src/mainboard/hp/2760p/devicetree.cb
index e63b69c..041b5e8 100644
--- a/src/mainboard/hp/2760p/devicetree.cb
+++ b/src/mainboard/hp/2760p/devicetree.cb
@@ -106,7 +106,7 @@
 			end
 			device pci 1c.5 off # PCIe Port #6
 			end
-			device pci 1c.6 off # PCIe Port #7
+			device pci 1c.6 on # PCIe Port #7, WWAN
 			end
 			device pci 1c.7 off # PCIe Port #8
 			end
diff --git a/src/mainboard/hp/8460p/devicetree.cb b/src/mainboard/hp/8460p/devicetree.cb
index ae78f8a..9f9efbb 100644
--- a/src/mainboard/hp/8460p/devicetree.cb
+++ b/src/mainboard/hp/8460p/devicetree.cb
@@ -67,6 +67,7 @@
 			register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }"
 			register "pcie_port_coalesce" = "1"
 			register "sata_interface_speed_support" = "0x3"
+			# HDD(0), ODD(1), docking(3,5), eSATA(4)
 			register "sata_port_map" = "0x3b"
 
 			register "spi_uvscc" = "0x2005"
@@ -107,7 +108,7 @@
 			end
 			device pci 1c.5 off # PCIe Port #6
 			end
-			device pci 1c.6 off # PCIe Port #7
+			device pci 1c.6 on # PCIe Port #7, WWAN
 			end
 			device pci 1c.7 on # PCIe Port #8, NEC USB 3.0 Host Controller
 				subsystemid 0x103c 0x161c
diff --git a/src/mainboard/hp/8460p/romstage.c b/src/mainboard/hp/8460p/romstage.c
index 7d228e9..38c1a9b 100644
--- a/src/mainboard/hp/8460p/romstage.c
+++ b/src/mainboard/hp/8460p/romstage.c
@@ -44,20 +44,20 @@
 }
 
 const struct southbridge_usb_port mainboard_usb_ports[] = {
-	{ 1, 1, 0 },
-	{ 1, 0, 0 },
+	{ 1, 1, 0 }, /* USB0, eSATA */
+	{ 1, 0, 0 }, /* USB charger */
 	{ 0, 1, 1 },
-	{ 1, 1, 1 },
-	{ 1, 0, 2 },
-	{ 1, 0, 2 },
+	{ 1, 1, 1 }, /* camera */
+	{ 1, 0, 2 }, /* USB4 expresscard */
+	{ 1, 0, 2 }, /* bluetooth (WLAN) */
 	{ 0, 0, 3 },
-	{ 1, 0, 3 },
-	{ 1, 1, 4 },
-	{ 1, 1, 4 },
-	{ 1, 0, 5 },
-	{ 1, 0, 5 },
-	{ 1, 0, 6 },
-	{ 1, 0, 6 },
+	{ 1, 0, 3 }, /* smartcard */
+	{ 1, 1, 4 }, /* fingerprint */
+	{ 1, 1, 4 }, /* WWAN */
+	{ 1, 0, 5 }, /* CONN */
+	{ 1, 0, 5 }, /* docking */
+	{ 1, 0, 6 }, /* CONN */
+	{ 1, 0, 6 }, /* docking */
 };
 
 void mainboard_early_init(int s3resume)
diff --git a/src/mainboard/hp/8470p/devicetree.cb b/src/mainboard/hp/8470p/devicetree.cb
index b7254bb..9d6fe3f 100644
--- a/src/mainboard/hp/8470p/devicetree.cb
+++ b/src/mainboard/hp/8470p/devicetree.cb
@@ -68,7 +68,8 @@
 			register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }"
 			register "pcie_port_coalesce" = "1"
 			register "sata_interface_speed_support" = "0x3"
-			register "sata_port_map" = "0x3b"
+			# HDD(0), ODD(1), mSATA(2), eSATA(4)
+			register "sata_port_map" = "0x3f"
 			register "superspeed_capable_ports" = "0x0000000f"
 			register "xhci_overcurrent_mapping" = "0x00000c03"
 			register "xhci_switchable_ports" = "0x0000000f"

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ib5209f2dfb249fca5bae89bc6da3b704c8e903dd
Gerrit-Change-Number: 23357
Gerrit-PatchSet: 1
Gerrit-Owner: Iru Cai <mytbk920423 at gmail.com>
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