<p>Iru Cai has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/23357">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mb/hp: Enable additional ports at WWAN slot for Elitebooks<br><br>2760p: enable PCIe<br>8470p: enable mSATA<br>8460p: enable PCIe, also add comments according to circuit diagram<br><br>Change-Id: Ib5209f2dfb249fca5bae89bc6da3b704c8e903dd<br>Signed-off-by: Iru Cai <mytbk920423@gmail.com><br>---<br>M src/mainboard/hp/2760p/devicetree.cb<br>M src/mainboard/hp/8460p/devicetree.cb<br>M src/mainboard/hp/8460p/romstage.c<br>M src/mainboard/hp/8470p/devicetree.cb<br>4 files changed, 17 insertions(+), 15 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/23357/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/hp/2760p/devicetree.cb b/src/mainboard/hp/2760p/devicetree.cb</span><br><span>index e63b69c..041b5e8 100644</span><br><span>--- a/src/mainboard/hp/2760p/devicetree.cb</span><br><span>+++ b/src/mainboard/hp/2760p/devicetree.cb</span><br><span>@@ -106,7 +106,7 @@</span><br><span>                     end</span><br><span>                  device pci 1c.5 off # PCIe Port #6</span><br><span>                   end</span><br><span style="color: hsl(0, 100%, 40%);">-                     device pci 1c.6 off # PCIe Port #7</span><br><span style="color: hsl(120, 100%, 40%);">+                    device pci 1c.6 on # PCIe Port #7, WWAN</span><br><span>                      end</span><br><span>                  device pci 1c.7 off # PCIe Port #8</span><br><span>                   end</span><br><span>diff --git a/src/mainboard/hp/8460p/devicetree.cb b/src/mainboard/hp/8460p/devicetree.cb</span><br><span>index ae78f8a..9f9efbb 100644</span><br><span>--- a/src/mainboard/hp/8460p/devicetree.cb</span><br><span>+++ b/src/mainboard/hp/8460p/devicetree.cb</span><br><span>@@ -67,6 +67,7 @@</span><br><span>                         register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }"</span><br><span>                       register "pcie_port_coalesce" = "1"</span><br><span>                      register "sata_interface_speed_support" = "0x3"</span><br><span style="color: hsl(120, 100%, 40%);">+                   # HDD(0), ODD(1), docking(3,5), eSATA(4)</span><br><span>                     register "sata_port_map" = "0x3b"</span><br><span> </span><br><span>                    register "spi_uvscc" = "0x2005"</span><br><span>@@ -107,7 +108,7 @@</span><br><span>                    end</span><br><span>                  device pci 1c.5 off # PCIe Port #6</span><br><span>                   end</span><br><span style="color: hsl(0, 100%, 40%);">-                     device pci 1c.6 off # PCIe Port #7</span><br><span style="color: hsl(120, 100%, 40%);">+                    device pci 1c.6 on # PCIe Port #7, WWAN</span><br><span>                      end</span><br><span>                  device pci 1c.7 on # PCIe Port #8, NEC USB 3.0 Host Controller</span><br><span>                               subsystemid 0x103c 0x161c</span><br><span>diff --git a/src/mainboard/hp/8460p/romstage.c b/src/mainboard/hp/8460p/romstage.c</span><br><span>index 7d228e9..38c1a9b 100644</span><br><span>--- a/src/mainboard/hp/8460p/romstage.c</span><br><span>+++ b/src/mainboard/hp/8460p/romstage.c</span><br><span>@@ -44,20 +44,20 @@</span><br><span> }</span><br><span> </span><br><span> const struct southbridge_usb_port mainboard_usb_ports[] = {</span><br><span style="color: hsl(0, 100%, 40%);">-        { 1, 1, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">-    { 1, 0, 0 },</span><br><span style="color: hsl(120, 100%, 40%);">+  { 1, 1, 0 }, /* USB0, eSATA */</span><br><span style="color: hsl(120, 100%, 40%);">+        { 1, 0, 0 }, /* USB charger */</span><br><span>       { 0, 1, 1 },</span><br><span style="color: hsl(0, 100%, 40%);">-    { 1, 1, 1 },</span><br><span style="color: hsl(0, 100%, 40%);">-    { 1, 0, 2 },</span><br><span style="color: hsl(0, 100%, 40%);">-    { 1, 0, 2 },</span><br><span style="color: hsl(120, 100%, 40%);">+  { 1, 1, 1 }, /* camera */</span><br><span style="color: hsl(120, 100%, 40%);">+     { 1, 0, 2 }, /* USB4 expresscard */</span><br><span style="color: hsl(120, 100%, 40%);">+   { 1, 0, 2 }, /* bluetooth (WLAN) */</span><br><span>  { 0, 0, 3 },</span><br><span style="color: hsl(0, 100%, 40%);">-    { 1, 0, 3 },</span><br><span style="color: hsl(0, 100%, 40%);">-    { 1, 1, 4 },</span><br><span style="color: hsl(0, 100%, 40%);">-    { 1, 1, 4 },</span><br><span style="color: hsl(0, 100%, 40%);">-    { 1, 0, 5 },</span><br><span style="color: hsl(0, 100%, 40%);">-    { 1, 0, 5 },</span><br><span style="color: hsl(0, 100%, 40%);">-    { 1, 0, 6 },</span><br><span style="color: hsl(0, 100%, 40%);">-    { 1, 0, 6 },</span><br><span style="color: hsl(120, 100%, 40%);">+  { 1, 0, 3 }, /* smartcard */</span><br><span style="color: hsl(120, 100%, 40%);">+  { 1, 1, 4 }, /* fingerprint */</span><br><span style="color: hsl(120, 100%, 40%);">+        { 1, 1, 4 }, /* WWAN */</span><br><span style="color: hsl(120, 100%, 40%);">+       { 1, 0, 5 }, /* CONN */</span><br><span style="color: hsl(120, 100%, 40%);">+       { 1, 0, 5 }, /* docking */</span><br><span style="color: hsl(120, 100%, 40%);">+    { 1, 0, 6 }, /* CONN */</span><br><span style="color: hsl(120, 100%, 40%);">+       { 1, 0, 6 }, /* docking */</span><br><span> };</span><br><span> </span><br><span> void mainboard_early_init(int s3resume)</span><br><span>diff --git a/src/mainboard/hp/8470p/devicetree.cb b/src/mainboard/hp/8470p/devicetree.cb</span><br><span>index b7254bb..9d6fe3f 100644</span><br><span>--- a/src/mainboard/hp/8470p/devicetree.cb</span><br><span>+++ b/src/mainboard/hp/8470p/devicetree.cb</span><br><span>@@ -68,7 +68,8 @@</span><br><span>                     register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }"</span><br><span>                       register "pcie_port_coalesce" = "1"</span><br><span>                      register "sata_interface_speed_support" = "0x3"</span><br><span style="color: hsl(0, 100%, 40%);">-                     register "sata_port_map" = "0x3b"</span><br><span style="color: hsl(120, 100%, 40%);">+                 # HDD(0), ODD(1), mSATA(2), eSATA(4)</span><br><span style="color: hsl(120, 100%, 40%);">+                  register "sata_port_map" = "0x3f"</span><br><span>                        register "superspeed_capable_ports" = "0x0000000f"</span><br><span>                       register "xhci_overcurrent_mapping" = "0x00000c03"</span><br><span>                       register "xhci_switchable_ports" = "0x0000000f"</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/23357">change 23357</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/23357"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ib5209f2dfb249fca5bae89bc6da3b704c8e903dd </div>
<div style="display:none"> Gerrit-Change-Number: 23357 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Iru Cai <mytbk920423@gmail.com> </div>