[coreboot-gerrit] Change in coreboot[master]: AMD/stoneyridge: Fix SATA reset inconsistency

[Richard Spiegel (Code Review)]

Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/23295


Change subject: AMD/stoneyridge: Fix SATA reset inconsistency
......................................................................

AMD/stoneyridge: Fix SATA reset inconsistency

At AGESA AmdInitReset, SATA enable and IDE enable (elements of
FCH_RESET_INTERFACE) are programmed twice (before calling AGESA
for AmdInitReset and from said AGESA function call out), using
different functions with different results. The first would result
in TRUE/FALSE, the second set would result in TRUE/TRUE. Use the
functions of the second set within the first set, and remove them
from the second set.

BUG=b:71754828
TEST=Build kahlle without the change, boot and record output. Rebuild
kahlee with the change, boot and record output. Compare both outputs,
the should be no change except in timing.

Change-Id: I326fcc8801542aa7feef286d02abdfe63354cdd0
Signed-off-by: Richard Spiegel <richard.spiegel at silverbackltd.com>
---
M src/soc/amd/stoneyridge/BiosCallOuts.c
M src/soc/amd/stoneyridge/southbridge.c
2 files changed, 2 insertions(+), 4 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/23295/1

diff --git a/src/soc/amd/stoneyridge/BiosCallOuts.c b/src/soc/amd/stoneyridge/BiosCallOuts.c
index f6ac187..cb225ec 100644
--- a/src/soc/amd/stoneyridge/BiosCallOuts.c
+++ b/src/soc/amd/stoneyridge/BiosCallOuts.c
@@ -35,8 +35,6 @@
 		FCH_RESET_DATA_BLOCK *FchParams_reset;
 		FchParams_reset = (FCH_RESET_DATA_BLOCK *)FchData;
 		printk(BIOS_DEBUG, "Fch OEM config in INIT RESET ");
-		FchParams_reset->FchReset.SataEnable = sb_sata_enable();
-		FchParams_reset->FchReset.IdeEnable = sb_ide_enable();
 
 		/* Get platform specific configuration changes */
 		platform_FchParams_reset(FchParams_reset);
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index 1357257..0f92001 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -42,8 +42,8 @@
 void SetFchResetParams(FCH_RESET_INTERFACE *params)
 {
 	params->Xhci0Enable = IS_ENABLED(CONFIG_STONEYRIDGE_XHCI_ENABLE);
-	params->SataEnable = is_sata_config();
-	params->IdeEnable = !params->SataEnable;
+	params->SataEnable = sb_sata_enable();
+	params->IdeEnable = sb_ide_enable();
 }
 
 void SetFchEnvParams(FCH_INTERFACE *params)

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I326fcc8801542aa7feef286d02abdfe63354cdd0
Gerrit-Change-Number: 23295
Gerrit-PatchSet: 1
Gerrit-Owner: Richard Spiegel <richard.spiegel at silverbackltd.com>
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