[coreboot-gerrit] Change in coreboot[master]: soc/intel/apollolake: Fix ACPI BAR in PMC config space

[Hannah Williams (Code Review)]

Hannah Williams has uploaded this change for review. ( https://review.coreboot.org/23230


Change subject: soc/intel/apollolake: Fix ACPI BAR in PMC config space
......................................................................

soc/intel/apollolake: Fix ACPI BAR in PMC config space

read_resources in common/block/pmc/pmc.c is corrupting the BAR
at offset 0x20.

pch_pmc_read_resources
                      |
                      pci_dev_read_resources
                                            |
                                            pci_get_resource
Within pci_get_resource, the BAR is read and written back. Since
read of ACPI BAR does not return the correct value, the subsequent
write corrupts the BAR.
Hence re-programming the BAR

Change-Id: I27062419d06127951ecbbb641835d06ca39ff435
Signed-off-by: Hannah Williams <hannah.williams at intel.com>
---
M src/soc/intel/apollolake/pmc.c
1 file changed, 4 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/23230/1

diff --git a/src/soc/intel/apollolake/pmc.c b/src/soc/intel/apollolake/pmc.c
index 58cb71a..e9e49af 100644
--- a/src/soc/intel/apollolake/pmc.c
+++ b/src/soc/intel/apollolake/pmc.c
@@ -95,6 +95,10 @@
 {
 	const struct soc_intel_apollolake_config *cfg = dev->chip_info;
 
+	/* Restoring the BAR */
+	pci_write_config16(dev, PCI_BASE_ADDRESS_4, ACPI_BASE_ADDRESS);
+	pci_write_config16(dev, PCI_COMMAND,
+		PCI_COMMAND_IO | PCI_COMMAND_MASTER);
 	/* Set up GPE configuration */
 	pmc_gpe_init();
 	pmc_fixup_power_state();

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I27062419d06127951ecbbb641835d06ca39ff435
Gerrit-Change-Number: 23230
Gerrit-PatchSet: 1
Gerrit-Owner: Hannah Williams <hannah.williams at intel.com>
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