[coreboot-gerrit] Change in coreboot[master]: mainboard/google/zoombini/variants/meowth: fix gpio settings

[Nick Vaccaro (Code Review)]

Hello Nick Vaccaro,

I'd like you to do a code review. Please visit

    https://review.coreboot.org/23195

to review the following change.


Change subject: mainboard/google/zoombini/variants/meowth: fix gpio settings
......................................................................

mainboard/google/zoombini/variants/meowth: fix gpio settings

-change GPP_C12 (H1 IRQ) to use GPI_SCI_LOW and level triggered
-set gspi gpios to no connects if CONFIG_ZOOMBINI_USE_SPI_TPM not set

BUG=b:69011806
BRANCH=chromeos-2016.05
TEST='emerge-meowth coreboot' succeeds

Change-Id: Ida1d1050db12982c3c497656162cc84c62a77f70
Signed-off-by: Nick Vaccaro <nvaccaro at chromium.org>
---
M src/mainboard/google/zoombini/variants/meowth/gpio.c
1 file changed, 8 insertions(+), 4 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/23195/1

diff --git a/src/mainboard/google/zoombini/variants/meowth/gpio.c b/src/mainboard/google/zoombini/variants/meowth/gpio.c
index 39c2605..8ceb6e8 100644
--- a/src/mainboard/google/zoombini/variants/meowth/gpio.c
+++ b/src/mainboard/google/zoombini/variants/meowth/gpio.c
@@ -98,8 +98,8 @@
 				   NF1), /* UART_PCH_TX_DEBUG_RX */
 /* UART0_RTS# */	PAD_CFG_GPO(GPP_C10, 0, DEEP), /* PP3300_TOUCH_EN */
 /* UART0_CTS# */	PAD_NC(GPP_C11, NONE),
-/* UART1_RXD */         PAD_CFG_GPI_APIC(GPP_C12, NONE, DEEP, EDGE_SINGLE,
-					 INVERT), /* H1_PCH_INT_ODL */
+/* UART1_RXD */         PAD_CFG_GPI_SCI_LOW(GPP_C12, NONE, DEEP,
+					    LEVEL), /* H1_PCH_INT_ODL */
 /* UART1_TXD */		PAD_NC(GPP_C13, NONE),
 /* UART1_RTS# */	PAD_CFG_GPI_SCI(GPP_C14, NONE, DEEP, EDGE_SINGLE,
 					NONE), /* TOUCHSCREEN_INT_ODL */
@@ -265,9 +265,13 @@
 				   NF1), /* PCH_SPI_H1_3V3_MISO */
 /* GSPI0_MOSI */	PAD_CFG_NF(GPP_B18, NONE, DEEP,
 				   NF1), /* PCH_SPI_H1_3V3_MOSI */
+#else
+/* GSPI0_CS# */		PAD_NC(GPP_B15, NONE),
+/* GSPI0_CLK */		PAD_NC(GPP_B16, NONE),
+/* GSPI0_MISO */	PAD_NC(GPP_B17, NONE),
+/* GSPI0_MOSI */	PAD_NC(GPP_B18, NONE),
 #endif
-/* UART1_RXD */         PAD_CFG_GPI_APIC(GPP_C12, NONE, DEEP, EDGE_SINGLE,
-					 INVERT), /* H1_PCH_INT_ODL */
+/* UART1_RXD */         PAD_CFG_GPI_SCI_LOW(GPP_C12, NONE, DEEP, LEVEL),
 };
 
 const struct pad_config *variant_gpio_table(size_t *num)

-- 
To view, visit https://review.coreboot.org/23195
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ida1d1050db12982c3c497656162cc84c62a77f70
Gerrit-Change-Number: 23195
Gerrit-PatchSet: 1
Gerrit-Owner: Nick Vaccaro <nvaccaro at google.com>
Gerrit-Reviewer: Nick Vaccaro <nvaccaro at chromium.org>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20180109/0a5dae00/attachment-0001.html>