[coreboot-gerrit] Change in coreboot[master]: soc/cavium: Clean bootblock
Patrick Rudolph (Code Review)
gerrit at coreboot.org
Thu Feb 15 16:28:33 CET 2018
Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/23780
Change subject: soc/cavium: Clean bootblock
......................................................................
soc/cavium: Clean bootblock
Get rid of unused bootblock stuff.
Change-Id: I9900848f8b69e3bd391ae99ed706edc4b1a1b922
Signed-off-by: Patrick Rudolph <patrick.rudolph at 9elements.com>
---
M src/soc/cavium/cn81xx/bootblock.c
1 file changed, 3 insertions(+), 70 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/23780/1
diff --git a/src/soc/cavium/cn81xx/bootblock.c b/src/soc/cavium/cn81xx/bootblock.c
index 66fb98c..d832804 100644
--- a/src/soc/cavium/cn81xx/bootblock.c
+++ b/src/soc/cavium/cn81xx/bootblock.c
@@ -10,84 +10,17 @@
#include <commonlib/helpers.h>
#include <soc/bootblock.h>
#include <soc/asm.h>
-#include <soc/clock.h>
-#include <soc/l2c.h>
-#include <soc/mmu_operations.h>
-#include <soc/sdram.h>
#include <soc/sysreg.h>
#include <soc/timer.h>
-#include <console/console.h> /* FIXME: for debug prints */
-#include <delay.h> /* FIXME: for debug prints */
-#include <arch/cache.h>
-
-
-#include <arch/exception.h>
-#include <program_loading.h>
-#include <timestamp.h>
-
static void init_sysreg(void)
{
-#if 0
- if (CAVIUM_IS_MODEL(CAVIUM_CN88XX_PASS1_X))
- {
- bdk_ap_cvmctl_el1_t cvmctl_el1;
- BDK_MRS(s3_0_c11_c0_0, cvmctl_el1.u);
-
- /* Errara (AP-22934) CIM module has incorrect conditional clock */
- if (CAVIUM_IS_MODEL(CAVIUM_CN88XX_PASS1_0))
- cvmctl_el1.s.force_issue_clock = 1;
-
- /* Errata (AP-22500) GlobalSync request during a multi-cycle ATOMIC
- stalls forever */
- /* Disable compare and swap on CN88XX pass 1.x */
- cvmctl_el1.s.disable_casp = 1;
- cvmctl_el1.s.disable_cas = 1;
-
- /* (AP-26147) Event register may not be set */
- cvmctl_el1.s.disable_wfe = 1;
-
- BDK_MSR(s3_0_c11_c0_0, cvmctl_el1.u);
- }
-
- /* Bug #27499 - ISB not flushing the pipeline after a TLBI */
- if (CAVIUM_IS_MODEL(CAVIUM_CN88XX))
- {
- bdk_ap_cvmctl_el1_t cvmctl_el1;
- BDK_MRS(s3_0_c11_c0_0, cvmctl_el1.u);
- cvmctl_el1.s.isb_flush = 1;
- BDK_MSR(s3_0_c11_c0_0, cvmctl_el1.u);
- }
-#endif
-
-#if 0
- /* The defaults for write buffer timeouts are poor */
- bdk_ap_cvmmemctl0_el1_t cvmmemctl0_el1;
- BDK_MRS(s3_0_c11_c0_4, cvmmemctl0_el1.u);
- cvmmemctl0_el1.s.wbftonshena = 1; /* NSH has 2^18 timeout. All BDK mem is NSH */
- cvmmemctl0_el1.s.wbftomrgclrena = 1; /* Reset timer on merge. Hardware default is brain dead */
- /* Errata (AP-27388) Flavors of DMB not stalling on subsequent LD */
- if (CAVIUM_IS_MODEL(CAVIUM_CN88XX_PASS2_X))
- cvmmemctl0_el1.s.dmbstallforce = 1;
- BDK_MSR(s3_0_c11_c0_4, cvmmemctl0_el1.u);
-#endif
+ /* The defaults for write buffer timeouts are poor */
u64 cvmmemctl0;
BDK_MRS(s3_0_c11_c0_4, cvmmemctl0);
- cvmmemctl0 |= AP_CVMMEMCTL0_EL1_WBFTONSHENA | AP_CVMMEMCTL0_EL1_WBFTOMRGCLRENA;
- /* see BDK for errata AP-27388 workaround on CN88xx */
+ cvmmemctl0 |= AP_CVMMEMCTL0_EL1_WBFTONSHENA |
+ AP_CVMMEMCTL0_EL1_WBFTOMRGCLRENA;
BDK_MSR(s3_0_c11_c0_4, cvmmemctl0);
-
-#if 0
- /* Enable LMTST and IOATOMIC on CN83XX */
- if (CAVIUM_IS_MODEL(CAVIUM_CN83XX) || CAVIUM_IS_MODEL(CAVIUM_CN93XX))
- {
- bdk_ap_cvmmemctl1_el1_t cvmmemctl1_el1;
- BDK_MRS(s3_0_c11_c0_5, cvmmemctl1_el1.u);
- cvmmemctl1_el1.s.lmtstena = 1;
- cvmmemctl1_el1.s.ioatomicena = 1; // pko _OP_OPEN/CLOSE/QUERY needs that
- BDK_MSR(s3_0_c11_c0_5, cvmmemctl1_el1.u);
- }
-#endif
}
void bootblock_soc_early_init(void)
--
To view, visit https://review.coreboot.org/23780
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I9900848f8b69e3bd391ae99ed706edc4b1a1b922
Gerrit-Change-Number: 23780
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Rudolph <patrick.rudolph at 9elements.com>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20180215/c1952558/attachment.html>
More information about the coreboot-gerrit
mailing list