[coreboot-gerrit] Change in coreboot[master]: driver/uart: Reintroduce default_baudrate as weak function.
Julien Viard de Galbert (Code Review)
gerrit at coreboot.org
Mon Feb 12 15:01:59 CET 2018
Julien Viard de Galbert has uploaded this change for review. ( https://review.coreboot.org/23713
Change subject: driver/uart: Reintroduce default_baudrate as weak function.
......................................................................
driver/uart: Reintroduce default_baudrate as weak function.
The rationale is to allow the mainboard to override the default
baudrate for instance by sampling GPIOs at boot.
This partially reverts the commit named
"mb/*/*: Remove rtc nvram configurable baud rate"
commit b29078e4015bbc3e8cf00ba64f0799c087546563.
Change-Id: I970ee788bf90b9e1a8c6ccdc5eee8029d9af0ecc
Signed-off-by: Julien Viard de Galbert <jviarddegalbert at online.net>
---
M src/cpu/allwinner/a10/uart.c
M src/cpu/allwinner/a10/uart_console.c
M src/cpu/ti/am335x/uart.c
M src/drivers/uart/pl011.c
M src/drivers/uart/uart8250io.c
M src/drivers/uart/uart8250mem.c
M src/drivers/uart/util.c
M src/include/console/uart.h
M src/soc/broadcom/cygnus/ns16550.c
M src/soc/imgtec/pistachio/uart.c
M src/soc/mediatek/mt8173/uart.c
M src/soc/nvidia/tegra124/uart.c
M src/soc/nvidia/tegra210/uart.c
M src/soc/qualcomm/ipq40xx/uart.c
M src/soc/samsung/exynos5250/uart.c
M src/soc/samsung/exynos5420/uart.c
16 files changed, 35 insertions(+), 19 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/23713/1
diff --git a/src/cpu/allwinner/a10/uart.c b/src/cpu/allwinner/a10/uart.c
index f7c2db9..45dcaed 100644
--- a/src/cpu/allwinner/a10/uart.c
+++ b/src/cpu/allwinner/a10/uart.c
@@ -105,7 +105,7 @@
struct a10_uart *uart_base = uart_platform_baseptr(idx);
/* Use default 8N1 encoding */
- a10_uart_configure(uart_base, CONFIG_TTYS0_BAUD,
+ a10_uart_configure(uart_base, default_baudrate(),
8, UART_PARITY_NONE, 1);
a10_uart_enable_fifos(uart_base);
}
diff --git a/src/cpu/allwinner/a10/uart_console.c b/src/cpu/allwinner/a10/uart_console.c
index 03d4122..e7774c9 100644
--- a/src/cpu/allwinner/a10/uart_console.c
+++ b/src/cpu/allwinner/a10/uart_console.c
@@ -44,7 +44,7 @@
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
- serial.baud = CONFIG_TTYS0_BAUD;
+ serial.baud = default_baudrate();
serial.regwidth = 1;
serial.input_hertz = uart_platform_refclk();
serial.uart_pci_addr = 0;
diff --git a/src/cpu/ti/am335x/uart.c b/src/cpu/ti/am335x/uart.c
index 47b9a3d..45a693a 100644
--- a/src/cpu/ti/am335x/uart.c
+++ b/src/cpu/ti/am335x/uart.c
@@ -163,7 +163,7 @@
{
struct am335x_uart *uart = uart_platform_baseptr(idx);
uint16_t div = (uint16_t) uart_baudrate_divisor(
- CONFIG_TTYS0_BAUD, uart_platform_refclk(), 16);
+ default_baudrate(), uart_platform_refclk(), 16);
am335x_uart_init(uart, div);
}
@@ -189,7 +189,7 @@
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
- serial.baud = CONFIG_TTYS0_BAUD;
+ serial.baud = default_baudrate();
serial.regwidth = 2;
lb_add_serial(&serial, data);
diff --git a/src/drivers/uart/pl011.c b/src/drivers/uart/pl011.c
index 709320b..0c7ac08 100644
--- a/src/drivers/uart/pl011.c
+++ b/src/drivers/uart/pl011.c
@@ -46,7 +46,7 @@
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
- serial.baud = CONFIG_TTYS0_BAUD;
+ serial.baud = default_baudrate();
serial.regwidth = 1;
serial.input_hertz = uart_platform_refclk();
serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
diff --git a/src/drivers/uart/uart8250io.c b/src/drivers/uart/uart8250io.c
index ace2c59..4cc7fe3 100644
--- a/src/drivers/uart/uart8250io.c
+++ b/src/drivers/uart/uart8250io.c
@@ -107,7 +107,7 @@
{
if (!IS_ENABLED(CONFIG_DRIVERS_UART_8250IO_SKIP_INIT)) {
unsigned int div;
- div = uart_baudrate_divisor(CONFIG_TTYS0_BAUD,
+ div = uart_baudrate_divisor(default_baudrate(),
uart_platform_refclk(), uart_input_clock_divider());
uart8250_init(uart_platform_base(idx), div);
}
@@ -134,7 +134,7 @@
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_IO_MAPPED;
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
- serial.baud = CONFIG_TTYS0_BAUD;
+ serial.baud = default_baudrate();
serial.regwidth = 1;
serial.input_hertz = uart_platform_refclk();
serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
diff --git a/src/drivers/uart/uart8250mem.c b/src/drivers/uart/uart8250mem.c
index 9eb50cb..5a1e366 100644
--- a/src/drivers/uart/uart8250mem.c
+++ b/src/drivers/uart/uart8250mem.c
@@ -119,7 +119,7 @@
return;
unsigned int div;
- div = uart_baudrate_divisor(CONFIG_TTYS0_BAUD,
+ div = uart_baudrate_divisor(default_baudrate(),
uart_platform_refclk(), uart_input_clock_divider());
uart8250_mem_init(base, div);
}
@@ -156,7 +156,7 @@
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
if (!serial.baseaddr)
return;
- serial.baud = CONFIG_TTYS0_BAUD;
+ serial.baud = default_baudrate();
if (IS_ENABLED(CONFIG_DRIVERS_UART_8250MEM_32))
serial.regwidth = sizeof(uint32_t);
else
diff --git a/src/drivers/uart/util.c b/src/drivers/uart/util.c
index c7b9ab2..9f9b01b 100644
--- a/src/drivers/uart/util.c
+++ b/src/drivers/uart/util.c
@@ -14,6 +14,17 @@
#include <console/console.h>
#include <console/uart.h>
+#define DEFAULT_BAUDRATE 115200
+
+__attribute__((weak)) unsigned int default_baudrate(void)
+{
+ /*
+ * If TTYS0_BAUD is not configured, then by default use 115200 as the
+ * baud rate.
+ */
+ return CONFIG_TTYS0_BAUD ? CONFIG_TTYS0_BAUD : DEFAULT_BAUDRATE;
+}
+
/* Calculate divisor. Do not floor but round to nearest integer. */
unsigned int uart_baudrate_divisor(unsigned int baudrate,
unsigned int refclk, unsigned int oversample)
diff --git a/src/include/console/uart.h b/src/include/console/uart.h
index 0dccd00..e2df893 100644
--- a/src/include/console/uart.h
+++ b/src/include/console/uart.h
@@ -23,6 +23,11 @@
* baudrate generator. */
unsigned int uart_platform_refclk(void);
+/* Return the baudrate, defaults to CONFIG_TTYS0_BAUD.
+ * This function is weak and can be overridden by mainboard if needed.
+ */
+unsigned int default_baudrate(void);
+
/* Returns the divisor value for a given baudrate.
* The formula to satisfy is:
* refclk / divisor = baudrate * oversample
diff --git a/src/soc/broadcom/cygnus/ns16550.c b/src/soc/broadcom/cygnus/ns16550.c
index e700827..aa9dd2d 100644
--- a/src/soc/broadcom/cygnus/ns16550.c
+++ b/src/soc/broadcom/cygnus/ns16550.c
@@ -120,7 +120,7 @@
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = (uintptr_t)regs;
- serial.baud = CONFIG_TTYS0_BAUD;
+ serial.baud = default_baudrate();
serial.regwidth = 4;
lb_add_serial(&serial, data);
diff --git a/src/soc/imgtec/pistachio/uart.c b/src/soc/imgtec/pistachio/uart.c
index df1a5ac..1f39e8b 100644
--- a/src/soc/imgtec/pistachio/uart.c
+++ b/src/soc/imgtec/pistachio/uart.c
@@ -150,7 +150,7 @@
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = CONFIG_CONSOLE_SERIAL_UART_ADDRESS;
- serial.baud = CONFIG_TTYS0_BAUD;
+ serial.baud = default_baudrate();
serial.regwidth = 1 << UART_SHIFT;
lb_add_serial(&serial, data);
diff --git a/src/soc/mediatek/mt8173/uart.c b/src/soc/mediatek/mt8173/uart.c
index 36a279f..d0b140d 100644
--- a/src/soc/mediatek/mt8173/uart.c
+++ b/src/soc/mediatek/mt8173/uart.c
@@ -177,7 +177,7 @@
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = UART0_BASE;
- serial.baud = CONFIG_TTYS0_BAUD;
+ serial.baud = default_baudrate();
serial.regwidth = 4;
lb_add_serial(&serial, data);
diff --git a/src/soc/nvidia/tegra124/uart.c b/src/soc/nvidia/tegra124/uart.c
index 0d52337..76ea426 100644
--- a/src/soc/nvidia/tegra124/uart.c
+++ b/src/soc/nvidia/tegra124/uart.c
@@ -136,7 +136,7 @@
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
- serial.baud = CONFIG_TTYS0_BAUD;
+ serial.baud = default_baudrate();
serial.regwidth = 4;
lb_add_serial(&serial, data);
diff --git a/src/soc/nvidia/tegra210/uart.c b/src/soc/nvidia/tegra210/uart.c
index 1c52687..608b443 100644
--- a/src/soc/nvidia/tegra210/uart.c
+++ b/src/soc/nvidia/tegra210/uart.c
@@ -123,7 +123,7 @@
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = CONFIG_CONSOLE_SERIAL_TEGRA210_UART_ADDRESS;
- serial.baud = CONFIG_TTYS0_BAUD;
+ serial.baud = default_baudrate();
serial.regwidth = 4;
lb_add_serial(&serial, data);
diff --git a/src/soc/qualcomm/ipq40xx/uart.c b/src/soc/qualcomm/ipq40xx/uart.c
index 671a6d1..2ea390b 100644
--- a/src/soc/qualcomm/ipq40xx/uart.c
+++ b/src/soc/qualcomm/ipq40xx/uart.c
@@ -297,7 +297,7 @@
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = (uint32_t)UART1_DM_BASE;
- serial.baud = CONFIG_TTYS0_BAUD;
+ serial.baud = default_baudrate();
serial.regwidth = 1;
lb_add_serial(&serial, data);
diff --git a/src/soc/samsung/exynos5250/uart.c b/src/soc/samsung/exynos5250/uart.c
index 7ad6cbe..07f1e34 100644
--- a/src/soc/samsung/exynos5250/uart.c
+++ b/src/soc/samsung/exynos5250/uart.c
@@ -61,7 +61,7 @@
// All UARTs share the same clock.
uclk = clock_get_periph_rate(PERIPH_ID_UART3);
- val = uclk / CONFIG_TTYS0_BAUD;
+ val = uclk / default_baudrate();
write32(&uart->ubrdiv, val / 16 - 1);
@@ -191,7 +191,7 @@
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
- serial.baud = CONFIG_TTYS0_BAUD;
+ serial.baud = default_baudrate();
serial.regwidth = 4;
lb_add_serial(&serial, data);
diff --git a/src/soc/samsung/exynos5420/uart.c b/src/soc/samsung/exynos5420/uart.c
index a38be07..6f54c00 100644
--- a/src/soc/samsung/exynos5420/uart.c
+++ b/src/soc/samsung/exynos5420/uart.c
@@ -61,7 +61,7 @@
// All UARTs share the same clock.
uclk = clock_get_periph_rate(PERIPH_ID_UART3);
- val = uclk / CONFIG_TTYS0_BAUD;
+ val = uclk / default_baudrate();
write32(&uart->ubrdiv, val / 16 - 1);
@@ -182,7 +182,7 @@
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
- serial.baud = CONFIG_TTYS0_BAUD;
+ serial.baud = default_baudrate();
serial.regwidth = 4;
serial.input_hertz = uart_platform_refclk();
serial.uart_pci_addr = 0;
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I970ee788bf90b9e1a8c6ccdc5eee8029d9af0ecc
Gerrit-Change-Number: 23713
Gerrit-PatchSet: 1
Gerrit-Owner: Julien Viard de Galbert <jviarddegalbert at online.net>
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