[coreboot-gerrit] Change in coreboot[master]: src/cpu: Don't hide pointers behind typedefs
Elyes HAOUAS (Code Review)
gerrit at coreboot.org
Thu Feb 8 13:12:11 CET 2018
Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/23652
Change subject: src/cpu: Don't hide pointers behind typedefs
......................................................................
src/cpu: Don't hide pointers behind typedefs
See Change 7146
Change-Id: I17675b004023453f137abd387cfacd308d9b98b5
Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
M src/cpu/intel/fsp_model_206ax/acpi.c
M src/cpu/intel/fsp_model_406dx/acpi.c
M src/cpu/intel/haswell/acpi.c
M src/cpu/intel/haswell/smmrelocate.c
M src/cpu/intel/model_2065x/acpi.c
M src/cpu/intel/model_206ax/acpi.c
M src/cpu/intel/speedstep/acpi.c
7 files changed, 7 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/23652/1
diff --git a/src/cpu/intel/fsp_model_206ax/acpi.c b/src/cpu/intel/fsp_model_206ax/acpi.c
index 6bf30e1..a10c91b 100644
--- a/src/cpu/intel/fsp_model_206ax/acpi.c
+++ b/src/cpu/intel/fsp_model_206ax/acpi.c
@@ -298,7 +298,7 @@
acpigen_pop_len();
}
-void generate_cpu_entries(device_t device)
+void generate_cpu_entries(struct device *device)
{
int coreID, cpuID, pcontrol_blk = PMB0_BASE, plen = 6;
int totalcores = dev_count_cpu();
diff --git a/src/cpu/intel/fsp_model_406dx/acpi.c b/src/cpu/intel/fsp_model_406dx/acpi.c
index 2124386..80a56c0 100644
--- a/src/cpu/intel/fsp_model_406dx/acpi.c
+++ b/src/cpu/intel/fsp_model_406dx/acpi.c
@@ -259,7 +259,7 @@
acpigen_pop_len();
}
-void generate_cpu_entries(device_t device)
+void generate_cpu_entries(struct device *device)
{
int coreID, cpuID, pcontrol_blk = PMB0_BASE, plen = 6;
int totalcores = dev_count_cpu();
diff --git a/src/cpu/intel/haswell/acpi.c b/src/cpu/intel/haswell/acpi.c
index 74d8fba..40279bf 100644
--- a/src/cpu/intel/haswell/acpi.c
+++ b/src/cpu/intel/haswell/acpi.c
@@ -303,7 +303,7 @@
acpigen_pop_len();
}
-void generate_cpu_entries(device_t device)
+void generate_cpu_entries(struct device *device)
{
int coreID, cpuID, pcontrol_blk = get_pmbase(), plen = 6;
int totalcores = dev_count_cpu();
diff --git a/src/cpu/intel/haswell/smmrelocate.c b/src/cpu/intel/haswell/smmrelocate.c
index 8d9a4dc..d680497 100644
--- a/src/cpu/intel/haswell/smmrelocate.c
+++ b/src/cpu/intel/haswell/smmrelocate.c
@@ -308,7 +308,7 @@
void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
size_t *smm_save_state_size)
{
- device_t dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+ device dev = dev_find_slot(0, PCI_DEVFN(0, 0));
printk(BIOS_DEBUG, "Setting up SMI for CPU\n");
diff --git a/src/cpu/intel/model_2065x/acpi.c b/src/cpu/intel/model_2065x/acpi.c
index e64405ac..7de8b19 100644
--- a/src/cpu/intel/model_2065x/acpi.c
+++ b/src/cpu/intel/model_2065x/acpi.c
@@ -295,7 +295,7 @@
acpigen_pop_len();
}
-void generate_cpu_entries(device_t device)
+void generate_cpu_entries(struct device *device)
{
int coreID, cpuID, pcontrol_blk = PMB0_BASE, plen = 6;
int totalcores = dev_count_cpu();
diff --git a/src/cpu/intel/model_206ax/acpi.c b/src/cpu/intel/model_206ax/acpi.c
index 33c4212..8e2c0d1 100644
--- a/src/cpu/intel/model_206ax/acpi.c
+++ b/src/cpu/intel/model_206ax/acpi.c
@@ -298,7 +298,7 @@
acpigen_pop_len();
}
-void generate_cpu_entries(device_t device)
+void generate_cpu_entries(struct device *device)
{
int coreID, cpuID, pcontrol_blk = PMB0_BASE, plen = 6;
int totalcores = dev_count_cpu();
diff --git a/src/cpu/intel/speedstep/acpi.c b/src/cpu/intel/speedstep/acpi.c
index 73b7431..0feaa2f 100644
--- a/src/cpu/intel/speedstep/acpi.c
+++ b/src/cpu/intel/speedstep/acpi.c
@@ -113,7 +113,7 @@
/**
* @brief Generate ACPI entries for Speedstep for each cpu
*/
-void generate_cpu_entries(device_t device)
+void generate_cpu_entries(struct device *device)
{
int coreID, cpuID, pcontrol_blk = PMB0_BASE, plen = 6;
int totalcores = determine_total_number_of_cores();
--
To view, visit https://review.coreboot.org/23652
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I17675b004023453f137abd387cfacd308d9b98b5
Gerrit-Change-Number: 23652
Gerrit-PatchSet: 1
Gerrit-Owner: Elyes HAOUAS <ehaouas at noos.fr>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20180208/77c7c9e3/attachment.html>
More information about the coreboot-gerrit
mailing list