[coreboot-gerrit] Change in coreboot[master]: soc/amd/stoneyridge: Add gpio_set_config function

[Chris Ching (Code Review)]

Chris Ching has uploaded this change for review. ( https://review.coreboot.org/23624


Change subject: soc/amd/stoneyridge: Add gpio_set_config function
......................................................................

soc/amd/stoneyridge: Add gpio_set_config function

BUG=b:72838769
BRANCH=none
TEST=write and read values to GPIO_9 on grunt

Change-Id: I1addd3abcb6a57d916b1c93480bacb0450abddf2
Signed-off-by: Chris Ching <chingcodes at chromium.org>
---
M src/soc/amd/stoneyridge/gpio.c
M src/soc/amd/stoneyridge/include/soc/gpio.h
2 files changed, 26 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/23624/1

diff --git a/src/soc/amd/stoneyridge/gpio.c b/src/soc/amd/stoneyridge/gpio.c
index 59f283e..ec02c99 100644
--- a/src/soc/amd/stoneyridge/gpio.c
+++ b/src/soc/amd/stoneyridge/gpio.c
@@ -106,3 +106,14 @@
 {
 	return gpio;
 }
+
+void gpio_set_config(gpio_t gpio, uint32_t flags)
+{
+	uint32_t reg;
+	uintptr_t gpio_address = gpio_get_address(gpio);
+
+	/* Get current registries */
+	reg = read32((void *)gpio_address) & GPIO_REG_MASK;
+
+	write32((void *)gpio_address, reg | flags);
+}
diff --git a/src/soc/amd/stoneyridge/include/soc/gpio.h b/src/soc/amd/stoneyridge/include/soc/gpio.h
index 84a4e84..63f6dfa 100644
--- a/src/soc/amd/stoneyridge/include/soc/gpio.h
+++ b/src/soc/amd/stoneyridge/include/soc/gpio.h
@@ -23,12 +23,23 @@
 #include <soc/iomap.h>
 #include <types.h>
 
+#define GPIO_EDGEL_TRIG		(0 << 8)
+#define GPIO_LEVEL_TRIG		(1 << 8)
+#define GPIO_ACTIVE_HIGH	(0 << 9)
+#define GPIO_ACTIVE_LOW		(1 << 9)
+#define GPIO_ACTIVE_BOTH	(2 << 9)
+#define GPIO_INT_STATUS_EN	(1 << 11)
+#define GPIO_INT_DELIVERY_EN	(1 << 12)
 #define GPIO_PIN_STS		(1 << 16)
 #define GPIO_PULLUP_ENABLE	(1 << 20)
 #define GPIO_PULLDOWN_ENABLE	(1 << 21)
 #define GPIO_OUTPUT_SHIFT	22
 #define GPIO_OUTPUT_MASK	(1 << GPIO_OUTPUT_SHIFT)
 #define GPIO_OUTPUT_ENABLE	(1 << 23)
+#define GPIO_INT_STATUS		(1 << 28)
+#define GPIO_WAKE_STATUS	(1 << 29)
+
+#define GPIO_REG_MASK		(0x0f0eU << 16)
 
 /*
  * The definitions below should be used to make GPIO arrays compact and
@@ -143,5 +154,9 @@
 #define GPIO_148			148
 
 typedef uint32_t gpio_t;
+
+/* Configure the gpio with specific flags. */
+void gpio_set_config(gpio_t gpio, uint32_t flags);
+
 #endif /* __ACPI__ */
 #endif /* __STONEYRIDGE_GPIO_H__ */

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I1addd3abcb6a57d916b1c93480bacb0450abddf2
Gerrit-Change-Number: 23624
Gerrit-PatchSet: 1
Gerrit-Owner: Chris Ching <chingcodes at chromium.org>
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