<p>Chris Ching has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/23624">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/amd/stoneyridge: Add gpio_set_config function<br><br>BUG=b:72838769<br>BRANCH=none<br>TEST=write and read values to GPIO_9 on grunt<br><br>Change-Id: I1addd3abcb6a57d916b1c93480bacb0450abddf2<br>Signed-off-by: Chris Ching <chingcodes@chromium.org><br>---<br>M src/soc/amd/stoneyridge/gpio.c<br>M src/soc/amd/stoneyridge/include/soc/gpio.h<br>2 files changed, 26 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/23624/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/amd/stoneyridge/gpio.c b/src/soc/amd/stoneyridge/gpio.c</span><br><span>index 59f283e..ec02c99 100644</span><br><span>--- a/src/soc/amd/stoneyridge/gpio.c</span><br><span>+++ b/src/soc/amd/stoneyridge/gpio.c</span><br><span>@@ -106,3 +106,14 @@</span><br><span> {</span><br><span> return gpio;</span><br><span> }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+void gpio_set_config(gpio_t gpio, uint32_t flags)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t reg;</span><br><span style="color: hsl(120, 100%, 40%);">+ uintptr_t gpio_address = gpio_get_address(gpio);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Get current registries */</span><br><span style="color: hsl(120, 100%, 40%);">+ reg = read32((void *)gpio_address) & GPIO_REG_MASK;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ write32((void *)gpio_address, reg | flags);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span>diff --git a/src/soc/amd/stoneyridge/include/soc/gpio.h b/src/soc/amd/stoneyridge/include/soc/gpio.h</span><br><span>index 84a4e84..63f6dfa 100644</span><br><span>--- a/src/soc/amd/stoneyridge/include/soc/gpio.h</span><br><span>+++ b/src/soc/amd/stoneyridge/include/soc/gpio.h</span><br><span>@@ -23,12 +23,23 @@</span><br><span> #include <soc/iomap.h></span><br><span> #include <types.h></span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+#define GPIO_EDGEL_TRIG (0 << 8)</span><br><span style="color: hsl(120, 100%, 40%);">+#define GPIO_LEVEL_TRIG (1 << 8)</span><br><span style="color: hsl(120, 100%, 40%);">+#define GPIO_ACTIVE_HIGH (0 << 9)</span><br><span style="color: hsl(120, 100%, 40%);">+#define GPIO_ACTIVE_LOW (1 << 9)</span><br><span style="color: hsl(120, 100%, 40%);">+#define GPIO_ACTIVE_BOTH (2 << 9)</span><br><span style="color: hsl(120, 100%, 40%);">+#define GPIO_INT_STATUS_EN (1 << 11)</span><br><span style="color: hsl(120, 100%, 40%);">+#define GPIO_INT_DELIVERY_EN (1 << 12)</span><br><span> #define GPIO_PIN_STS (1 << 16)</span><br><span> #define GPIO_PULLUP_ENABLE (1 << 20)</span><br><span> #define GPIO_PULLDOWN_ENABLE (1 << 21)</span><br><span> #define GPIO_OUTPUT_SHIFT 22</span><br><span> #define GPIO_OUTPUT_MASK (1 << GPIO_OUTPUT_SHIFT)</span><br><span> #define GPIO_OUTPUT_ENABLE (1 << 23)</span><br><span style="color: hsl(120, 100%, 40%);">+#define GPIO_INT_STATUS (1 << 28)</span><br><span style="color: hsl(120, 100%, 40%);">+#define GPIO_WAKE_STATUS (1 << 29)</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#define GPIO_REG_MASK (0x0f0eU << 16)</span><br><span> </span><br><span> /*</span><br><span> * The definitions below should be used to make GPIO arrays compact and</span><br><span>@@ -143,5 +154,9 @@</span><br><span> #define GPIO_148 148</span><br><span> </span><br><span> typedef uint32_t gpio_t;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* Configure the gpio with specific flags. */</span><br><span style="color: hsl(120, 100%, 40%);">+void gpio_set_config(gpio_t gpio, uint32_t flags);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> #endif /* __ACPI__ */</span><br><span> #endif /* __STONEYRIDGE_GPIO_H__ */</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/23624">change 23624</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/23624"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I1addd3abcb6a57d916b1c93480bacb0450abddf2 </div>
<div style="display:none"> Gerrit-Change-Number: 23624 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Chris Ching <chingcodes@chromium.org> </div>