[coreboot-gerrit] Change in coreboot[master]: soc/amd/stoneyridge: initialize i2c buses marked as early init

[Daniel Kurtz (Code Review)]

Hello Daniel Kurtz,

I'd like you to do a code review. Please visit

    https://review.coreboot.org/23553

to review the following change.


Change subject: soc/amd/stoneyridge: initialize i2c buses marked as early init
......................................................................

soc/amd/stoneyridge: initialize i2c buses marked as early init

Initialize the i2c buses that are not marked as early init in the device
tree during ramstage.

BUG=b:69407112
TEST=Boot depthcharge w/ CLI enabled on grunt.
  devbeep
  => plays beep
BRANCH=None

Change-Id: I6e49b0de9116138ba102377d283e22d7b50d7dca
Signed-off-by: Daniel Kurtz <djkurtz at chromium.org>
---
M src/mainboard/google/kahlee/mainboard.c
M src/soc/amd/stoneyridge/i2c.c
M src/soc/amd/stoneyridge/include/soc/southbridge.h
3 files changed, 18 insertions(+), 2 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/23553/1

diff --git a/src/mainboard/google/kahlee/mainboard.c b/src/mainboard/google/kahlee/mainboard.c
index b080682..b1a449d 100644
--- a/src/mainboard/google/kahlee/mainboard.c
+++ b/src/mainboard/google/kahlee/mainboard.c
@@ -138,6 +138,9 @@
 	gpes = get_gpe_table(&num);
 	gpe_configure_sci(gpes, num);
 
+	/* Initialize i2c busses that were not initialized in bootblock */
+	i2c_soc_init();
+
 	/* Set GenIntDisable so that GPIO 90 is configured as a GPIO. */
 	if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_KAHLEE))
 		pm_write8(PM_PCIB_CFG,
diff --git a/src/soc/amd/stoneyridge/i2c.c b/src/soc/amd/stoneyridge/i2c.c
index 947c43f..543de07 100644
--- a/src/soc/amd/stoneyridge/i2c.c
+++ b/src/soc/amd/stoneyridge/i2c.c
@@ -101,7 +101,7 @@
 	return -1;
 }
 
-void i2c_soc_early_init(void)
+static void dw_i2c_soc_init(int is_early_init)
 {
 	size_t i;
 	const struct soc_amd_stoneyridge_config *config;
@@ -114,7 +114,7 @@
 	for (i = 0; i < ARRAY_SIZE(config->i2c); i++) {
 		const struct dw_i2c_bus_config *cfg  = &config->i2c[i];
 
-		if (!cfg->early_init)
+		if (cfg->early_init != is_early_init)
 			continue;
 
 		if (dw_i2c_init(i, cfg))
@@ -122,6 +122,16 @@
 	}
 }
 
+void i2c_soc_early_init(void)
+{
+	dw_i2c_soc_init(1);
+}
+
+void i2c_soc_init(void)
+{
+	dw_i2c_soc_init(0);
+}
+
 struct device_operations stoneyridge_i2c_mmio_ops = {
 	/* TODO(teravest): Move I2C resource info here. */
 	.read_resources = DEVICE_NOOP,
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index 2f9d9f9..7838f30 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -392,4 +392,7 @@
 /* Initialize all the i2c buses that are marked with early init. */
 void i2c_soc_early_init(void);
 
+/* Initialize all the i2c buses that are not marked with early init. */
+void i2c_soc_init(void)
+
 #endif /* __STONEYRIDGE_H__ */

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I6e49b0de9116138ba102377d283e22d7b50d7dca
Gerrit-Change-Number: 23553
Gerrit-PatchSet: 1
Gerrit-Owner: Daniel Kurtz <djkurtz at google.com>
Gerrit-Reviewer: Daniel Kurtz <djkurtz at chromium.org>
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