<p>Daniel Kurtz would like Daniel Kurtz to <strong>review</strong> this change.</p><p><a href="https://review.coreboot.org/23553">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/amd/stoneyridge: initialize i2c buses marked as early init<br><br>Initialize the i2c buses that are not marked as early init in the device<br>tree during ramstage.<br><br>BUG=b:69407112<br>TEST=Boot depthcharge w/ CLI enabled on grunt.<br>  devbeep<br>  => plays beep<br>BRANCH=None<br><br>Change-Id: I6e49b0de9116138ba102377d283e22d7b50d7dca<br>Signed-off-by: Daniel Kurtz <djkurtz@chromium.org><br>---<br>M src/mainboard/google/kahlee/mainboard.c<br>M src/soc/amd/stoneyridge/i2c.c<br>M src/soc/amd/stoneyridge/include/soc/southbridge.h<br>3 files changed, 18 insertions(+), 2 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/23553/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/kahlee/mainboard.c b/src/mainboard/google/kahlee/mainboard.c</span><br><span>index b080682..b1a449d 100644</span><br><span>--- a/src/mainboard/google/kahlee/mainboard.c</span><br><span>+++ b/src/mainboard/google/kahlee/mainboard.c</span><br><span>@@ -138,6 +138,9 @@</span><br><span>     gpes = get_gpe_table(&num);</span><br><span>      gpe_configure_sci(gpes, num);</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+     /* Initialize i2c busses that were not initialized in bootblock */</span><br><span style="color: hsl(120, 100%, 40%);">+    i2c_soc_init();</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span>    /* Set GenIntDisable so that GPIO 90 is configured as a GPIO. */</span><br><span>     if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_KAHLEE))</span><br><span>                 pm_write8(PM_PCIB_CFG,</span><br><span>diff --git a/src/soc/amd/stoneyridge/i2c.c b/src/soc/amd/stoneyridge/i2c.c</span><br><span>index 947c43f..543de07 100644</span><br><span>--- a/src/soc/amd/stoneyridge/i2c.c</span><br><span>+++ b/src/soc/amd/stoneyridge/i2c.c</span><br><span>@@ -101,7 +101,7 @@</span><br><span>        return -1;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void i2c_soc_early_init(void)</span><br><span style="color: hsl(120, 100%, 40%);">+static void dw_i2c_soc_init(int is_early_init)</span><br><span> {</span><br><span>        size_t i;</span><br><span>    const struct soc_amd_stoneyridge_config *config;</span><br><span>@@ -114,7 +114,7 @@</span><br><span>       for (i = 0; i < ARRAY_SIZE(config->i2c); i++) {</span><br><span>                const struct dw_i2c_bus_config *cfg  = &config->i2c[i];</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-              if (!cfg->early_init)</span><br><span style="color: hsl(120, 100%, 40%);">+              if (cfg->early_init != is_early_init)</span><br><span>                     continue;</span><br><span> </span><br><span>                if (dw_i2c_init(i, cfg))</span><br><span>@@ -122,6 +122,16 @@</span><br><span>      }</span><br><span> }</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+void i2c_soc_early_init(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+  dw_i2c_soc_init(1);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+void i2c_soc_init(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+  dw_i2c_soc_init(0);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> struct device_operations stoneyridge_i2c_mmio_ops = {</span><br><span>    /* TODO(teravest): Move I2C resource info here. */</span><br><span>   .read_resources = DEVICE_NOOP,</span><br><span>diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h</span><br><span>index 2f9d9f9..7838f30 100644</span><br><span>--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h</span><br><span>+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h</span><br><span>@@ -392,4 +392,7 @@</span><br><span> /* Initialize all the i2c buses that are marked with early init. */</span><br><span> void i2c_soc_early_init(void);</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+/* Initialize all the i2c buses that are not marked with early init. */</span><br><span style="color: hsl(120, 100%, 40%);">+void i2c_soc_init(void)</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> #endif /* __STONEYRIDGE_H__ */</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/23553">change 23553</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/23553"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I6e49b0de9116138ba102377d283e22d7b50d7dca </div>
<div style="display:none"> Gerrit-Change-Number: 23553 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Daniel Kurtz <djkurtz@google.com> </div>
<div style="display:none"> Gerrit-Reviewer: Daniel Kurtz <djkurtz@chromium.org> </div>