[coreboot-gerrit] Change in coreboot[master]: nb/intel/pineview: Avoid holes between TOM and cbmem_top

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/23550


Change subject: nb/intel/pineview: Avoid holes between TOM and cbmem_top
......................................................................

nb/intel/pineview: Avoid holes between TOM and cbmem_top

Having usable memory between top of lower usable memory and cbmem_top
creates problems for some payloads like tianocore and some versions of
memtest86+ don't like it either.

The solution is to mark that memory as reserved.

Change-Id: If5146cda1020b494af6d43e5d8055e0045fa5b82
Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
M src/northbridge/intel/pineview/northbridge.c
1 file changed, 2 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/23550/1

diff --git a/src/northbridge/intel/pineview/northbridge.c b/src/northbridge/intel/pineview/northbridge.c
index ea55974..ca6a1c2 100644
--- a/src/northbridge/intel/pineview/northbridge.c
+++ b/src/northbridge/intel/pineview/northbridge.c
@@ -98,6 +98,8 @@
 	/* Subtract TSEG size */
 	tseg_sizek = gtt_basek - tseg_basek;
 	tomk -= tseg_sizek;
+	/* Align top of ram down to cbmem_top */
+	tomk = ALIGN_DOWN(tomk, 4 << 10);
 
 	/* Report the memory regions */
 	ram_resource(dev, index++, 0, 640);

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: If5146cda1020b494af6d43e5d8055e0045fa5b82
Gerrit-Change-Number: 23550
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur at aheymans.xyz>
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