[coreboot-gerrit] Change in ...coreboot[master]: drivers/generic/bayhub: Add reset capability

[Richard Spiegel (Code Review)]

Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30319


Change subject: drivers/generic/bayhub: Add reset capability
......................................................................

drivers/generic/bayhub: Add reset capability

EMMC reset consumes time, so it's better to start it still at coreboot.
To inform the payload that reset was issued, set bit 15 of subsystem ID
if successful.

BUG=b:118680303
TEST=Added debug code to analyze its effects. Build and boot grunt.

Change-Id: Ic3878ee782c8da1a28c6d669dd7eceda7c8cf4e5
Signed-off-by: Richard Spiegel <richard.spiegel at silverbackltd.com>
---
M src/drivers/generic/bayhub/bh720.c
M src/drivers/generic/bayhub/bh720.h
M src/drivers/generic/bayhub/chip.h
M src/mainboard/google/kahlee/variants/grunt/devicetree.cb
4 files changed, 36 insertions(+), 4 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/30319/1

diff --git a/src/drivers/generic/bayhub/bh720.c b/src/drivers/generic/bayhub/bh720.c
index 2ac5387..0ccd7d5 100644
--- a/src/drivers/generic/bayhub/bh720.c
+++ b/src/drivers/generic/bayhub/bh720.c
@@ -20,6 +20,7 @@
 #include <device/path.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
+#include <device/pci_def.h>
 #include "chip.h"
 #include "bh720.h"
 
@@ -30,16 +31,18 @@
 static void bh720_init(struct device *dev)
 {
 	struct drivers_generic_bayhub_config *config = dev->chip_info;
+	u8 *ptr, byte;
 
 	pci_dev_init(dev);
 
+	pci_write_config32(dev, BH720_PROTECT,
+				   BH720_PROTECT_OFF | BH720_PROTECT_LOCK_OFF);
+
 	if (config && config->power_saving) {
 		/*
 		 * This procedure for enabling power-saving mode is from the
 		 * BayHub BIOS Implementation Guideline document.
 		 */
-		pci_write_config32(dev, BH720_PROTECT,
-				   BH720_PROTECT_OFF | BH720_PROTECT_LOCK_OFF);
 		pci_or_config32(dev, BH720_RTD3_L1, BH720_RTD3_L1_DISABLE_L1);
 		pci_or_config32(dev, BH720_LINK_CTRL,
 				BH720_LINK_CTRL_L0_ENABLE |
@@ -48,13 +51,31 @@
 		pci_update_config32(dev, BH720_MISC2, ~BH720_MISC2_ASPM_DISABLE,
 				    BH720_MISC2_APSM_CLKREQ_L1 |
 				    BH720_MISC2_APSM_PHY_L1);
-		pci_write_config32(dev, BH720_PROTECT,
-				   BH720_PROTECT_ON | BH720_PROTECT_LOCK_ON);
 
 		printk(BIOS_INFO, "BayHub BH720: Power-saving enabled (link_ctrl=%#x)\n",
 		       pci_read_config32(dev, BH720_LINK_CTRL));
 	}
 
+	if (config && config->early_reset) {
+		printk(BIOS_INFO, "BayHub BH720: Early reset ");
+		pci_or_config16(dev, PCI_SUBSYSTEM_ID, BH720_EARLY_RESET);
+		ptr = (u8 *)(pci_read_config32(dev, PCI_BASE_ADDRESS_0) +
+			     BH720_SOFTWARE_RESET);
+		byte = *ptr | BH720_RESET_ALL;
+		*ptr = byte;
+		if ((*ptr & BH720_RESET_ALL) == BH720_RESET_ALL)
+			printk(BIOS_INFO, "success\n");
+		else {
+			printk(BIOS_INFO, "failed\n");
+			pci_write_config16(dev, PCI_SUBSYSTEM_ID,
+				(~BH720_EARLY_RESET &
+				pci_read_config16(dev, PCI_SUBSYSTEM_ID)));
+		}
+	}
+
+	pci_write_config32(dev, BH720_PROTECT,
+				   BH720_PROTECT_ON | BH720_PROTECT_LOCK_ON);
+
 	board_bh720(dev);
 }
 
diff --git a/src/drivers/generic/bayhub/bh720.h b/src/drivers/generic/bayhub/bh720.h
index 3183bf1..eea18f0 100644
--- a/src/drivers/generic/bayhub/bh720.h
+++ b/src/drivers/generic/bayhub/bh720.h
@@ -51,4 +51,12 @@
 	BH720_PCR_CSR_EMMC_MODE_SEL	= BIT(22),
 };
 
+#define BH720_EARLY_RESET		BIT(15)
+
+/* memory mapped registers */
+#define BH720_SOFTWARE_RESET	0x2f
+#define  BH720_RESET_ALL	0x01
+#define  BH720_RESET_CMD	0x02
+#define  BH720_RESET_DATA	0x04
+
 void board_bh720(struct device *dev);
diff --git a/src/drivers/generic/bayhub/chip.h b/src/drivers/generic/bayhub/chip.h
index ea1d3bb..ec37f10 100644
--- a/src/drivers/generic/bayhub/chip.h
+++ b/src/drivers/generic/bayhub/chip.h
@@ -21,4 +21,6 @@
 struct drivers_generic_bayhub_config {
 	/* 1 to enable power-saving mode, 0 to disable */
 	int power_saving;
+	/* 1 to enable early reset, 0 to disable */
+	int early_reset;
 };
diff --git a/src/mainboard/google/kahlee/variants/grunt/devicetree.cb b/src/mainboard/google/kahlee/variants/grunt/devicetree.cb
index b37e1bf..363cd22 100644
--- a/src/mainboard/google/kahlee/variants/grunt/devicetree.cb
+++ b/src/mainboard/google/kahlee/variants/grunt/devicetree.cb
@@ -71,6 +71,7 @@
 		device pci 2.4 on
 			chip drivers/generic/bayhub
 				register "power_saving" = "1"
+				register "early_reset" = "1"
 				device pci 00.0 on end
 			end
 		end #

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ic3878ee782c8da1a28c6d669dd7eceda7c8cf4e5
Gerrit-Change-Number: 30319
Gerrit-PatchSet: 1
Gerrit-Owner: Richard Spiegel <richard.spiegel at silverbackltd.com>
Gerrit-MessageType: newchange
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