[coreboot-gerrit] Change in ...coreboot[master]: amd/stoneyridge: Clear SMI_EVENT_STATUS when entering S3/S5

[Edward Hill (Code Review)]

Edward Hill has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30304


Change subject: amd/stoneyridge: Clear SMI_EVENT_STATUS when entering S3/S5
......................................................................

amd/stoneyridge: Clear SMI_EVENT_STATUS when entering S3/S5

disable_all_smi_status() was not clearing SMI_EVENT_STATUS. This caused
us to complain in the eventlog (ELOG_SLEEP_PENDING_GPE0_WAKE) and then
wake early from sleep when waiting for a cr50 reset to turn on a cr50
update.

BUG=b:121203745
TEST=Careena remains in S5 until cr50 reset after cr50 update, and
ELOG_SLEEP_PENDING_GPE0_WAKE is no longer seen in eventlog.

Change-Id: I2eec014109249d5c3574c4dbdec5569e2a0bfc8e
Signed-off-by: Edward Hill <ecgh at chromium.org>
---
M src/soc/amd/stoneyridge/smihandler.c
1 file changed, 1 insertion(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/30304/1

diff --git a/src/soc/amd/stoneyridge/smihandler.c b/src/soc/amd/stoneyridge/smihandler.c
index a662bc5d..4854e52 100644
--- a/src/soc/amd/stoneyridge/smihandler.c
+++ b/src/soc/amd/stoneyridge/smihandler.c
@@ -113,6 +113,7 @@
 static void disable_all_smi_status(void)
 {
 	smi_write32(SMI_SCI_STATUS, smi_read32(SMI_SCI_STATUS));
+	smi_write32(SMI_EVENT_STATUS, smi_read32(SMI_EVENT_STATUS));
 	smi_write32(SMI_REG_SMISTS0, smi_read32(SMI_REG_SMISTS0));
 	smi_write32(SMI_REG_SMISTS1, smi_read32(SMI_REG_SMISTS1));
 	smi_write32(SMI_REG_SMISTS2, smi_read32(SMI_REG_SMISTS2));

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I2eec014109249d5c3574c4dbdec5569e2a0bfc8e
Gerrit-Change-Number: 30304
Gerrit-PatchSet: 1
Gerrit-Owner: Edward Hill <ecgh at chromium.org>
Gerrit-MessageType: newchange
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