[coreboot-gerrit] Change in ...coreboot[master]: mb/google/sarien: Disable unused SATA ports

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/30091 )

Change subject: mb/google/sarien: Disable unused SATA ports
......................................................................

mb/google/sarien: Disable unused SATA ports

Disable SATA port 0 and port 1 as that's not used as SATA on platform.

BUG=N/A
TEST=Build and boot up fine on google arcada board.

Change-Id: I1b8801f7a0f9b7847b85d7c315fa0a2093b32f70
Signed-off-by: Lijian Zhao <lijian.zhao at intel.com>
Reviewed-on: https://review.coreboot.org/c/30091
Tested-by: build bot (Jenkins) <no-reply at coreboot.org>
Reviewed-by: Roy Mingi Park <roy.mingi.park at intel.com>
Reviewed-by: Bora Guvendik <bora.guvendik at intel.com>
---
M src/mainboard/google/sarien/variants/arcada/devicetree.cb
1 file changed, 0 insertions(+), 4 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Bora Guvendik: Looks good to me, approved
  Roy Mingi Park: Looks good to me, but someone else must approve



diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb
index 924f51d..ed2c34c 100644
--- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb
+++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb
@@ -18,11 +18,7 @@
 	register "HeciEnabled" = "1"
 	register "SataSalpSupport" = "1"
 	register "SataMode" = "0"
-	register "SataPortsEnable[0]" = "0"
-	register "SataPortsEnable[1]" = "1"
 	register "SataPortsEnable[2]" = "1"
-	register "SataPortsDevSlp[0]" = "0"
-	register "SataPortsDevSlp[1]" = "1"
 	register "SataPortsDevSlp[2]" = "1"
 	register "InternalGfx" = "1"
 	register "SkipExtGfxScan" = "1"

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I1b8801f7a0f9b7847b85d7c315fa0a2093b32f70
Gerrit-Change-Number: 30091
Gerrit-PatchSet: 2
Gerrit-Owner: Lijian Zhao <lijian.zhao at intel.com>
Gerrit-Reviewer: Bora Guvendik <bora.guvendik at intel.com>
Gerrit-Reviewer: Lijian Zhao <lijian.zhao at intel.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi at google.com>
Gerrit-Reviewer: Roy Mingi Park <roy.mingi.park at intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-MessageType: merged
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