[coreboot-gerrit] Change in ...coreboot[master]: mb/google/sarien: Disable PCH Gigabit LAN
Patrick Georgi (Code Review)
gerrit at coreboot.org
Tue Dec 11 09:59:06 CET 2018
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/30096 )
Change subject: mb/google/sarien: Disable PCH Gigabit LAN
......................................................................
mb/google/sarien: Disable PCH Gigabit LAN
There's no LAN connection on Arcada board, so disable PCH GBE.
BUG=N/A
Change-Id: I07c66df50dbe9fefd95a67b5af9e3f61ce6a18aa
Signed-off-by: Lijian Zhao <lijian.zhao at intel.com>
Reviewed-on: https://review.coreboot.org/c/30096
Tested-by: build bot (Jenkins) <no-reply at coreboot.org>
Reviewed-by: Bora Guvendik <bora.guvendik at intel.com>
---
M src/mainboard/google/sarien/variants/arcada/devicetree.cb
1 file changed, 1 insertion(+), 6 deletions(-)
Approvals:
build bot (Jenkins): Verified
Bora Guvendik: Looks good to me, approved
diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb
index fccec9f..924f51d 100644
--- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb
+++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb
@@ -78,11 +78,6 @@
},
}"
- # PCIe port 9 for LAN
- register "PcieRpEnable[8]" = "1"
- register "PcieClkSrcUsage[0]" = "PCIE_CLK_LAN"
- register "PcieClkSrcClkReq[0]" = "0"
-
# PCIe port 10 for M.2 2230 WLAN
register "PcieRpEnable[9]" = "1"
register "PcieClkSrcUsage[2]" = "9"
@@ -250,6 +245,6 @@
device pci 1f.3 on end # Intel HDA
device pci 1f.4 on end # SMBus
device pci 1f.5 on end # PCH SPI
- device pci 1f.6 on end # GbE
+ device pci 1f.6 off end # GbE
end
end
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I07c66df50dbe9fefd95a67b5af9e3f61ce6a18aa
Gerrit-Change-Number: 30096
Gerrit-PatchSet: 5
Gerrit-Owner: Lijian Zhao <lijian.zhao at intel.com>
Gerrit-Reviewer: Bora Guvendik <bora.guvendik at intel.com>
Gerrit-Reviewer: Lijian Zhao <lijian.zhao at intel.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi at google.com>
Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati at intel.com>
Gerrit-Reviewer: Roy Mingi Park <roy.mingi.park at intel.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-MessageType: merged
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