[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/common: Add support for GPIO group pad base

[Duncan Laurie (Code Review)]

Duncan Laurie has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30131


Change subject: soc/intel/common: Add support for GPIO group pad base
......................................................................

soc/intel/common: Add support for GPIO group pad base

In some situations the GPIO pad numbers used by the OS are not
contiguous and coreboot must provide a way for ACPI to provide
the expected GPIO number to the OS.

To do this each GPIO group can now have a pad base value, which
will be used as the starting pin number for this group and it
is added to the relative pin number of this GPIO to compute the
ACPI pin number for a particular GPIO.

By default this change has no effect because the existing uses
of INTEL_GPP() will set the pad base to PAD_BASE_NONE and the
GPIO number is used as the ACPI pin number without translation.

BUG=b:120686247
TEST=tested on a sarien(cannonlake) board

Change-Id: I25f73df45ffae18c5721a00ca230a6b07c250bab
Signed-off-by: Duncan Laurie <dlaurie at google.com>
---
M src/soc/intel/common/block/gpio/gpio.c
M src/soc/intel/common/block/include/intelblocks/gpio.h
2 files changed, 45 insertions(+), 6 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/30131/1

diff --git a/src/soc/intel/common/block/gpio/gpio.c b/src/soc/intel/common/block/gpio/gpio.c
index 9b6ca7e..79cc573 100644
--- a/src/soc/intel/common/block/gpio/gpio.c
+++ b/src/soc/intel/common/block/gpio/gpio.c
@@ -397,10 +397,26 @@
 
 uint16_t gpio_acpi_pin(gpio_t gpio_num)
 {
-	if (!IS_ENABLED(CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_MULTI_ACPI_DEVICES))
+	const struct pad_community *comm;
+	size_t group, pin;
+
+	if (IS_ENABLED(CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_MULTI_ACPI_DEVICES))
+		return relative_pad_in_comm(gpio_get_community(gpio_num),
+					    gpio_num);
+
+	comm = gpio_get_community(gpio_num);
+	pin = relative_pad_in_comm(comm, gpio_num);
+	group = gpio_group_index(comm, pin);
+
+	/* If pad base is not set then use GPIO number as ACPI pin number. */
+	if (comm->groups[group].pad_base == PAD_BASE_NONE)
 		return gpio_num;
 
-	return relative_pad_in_comm(gpio_get_community(gpio_num), gpio_num);
+	/*
+	 * If this group has a non-zero pad base then compute the ACPI pin
+	 * number from the pad base and the relative pad in the group.
+	 */
+	return comm->groups[group].pad_base + gpio_within_group(comm, pin);
 }
 
 static void print_gpi_status(const struct gpi_status *sts)
diff --git a/src/soc/intel/common/block/include/intelblocks/gpio.h b/src/soc/intel/common/block/include/intelblocks/gpio.h
index 4e26db3..b6112d4 100644
--- a/src/soc/intel/common/block/include/intelblocks/gpio.h
+++ b/src/soc/intel/common/block/include/intelblocks/gpio.h
@@ -23,13 +23,30 @@
 #ifndef __ACPI__
 #include <types.h>
 
-#define INTEL_GPP(first_of_community, start_of_group, end_of_group) \
-	{                                               \
-		.first_pad = (start_of_group) - (first_of_community), \
-		.size = (end_of_group) - (start_of_group) + 1,        \
+/*
+ * GPIO numbers may not be contiguous and instead will have a different
+ * starting pin number for each pad group.
+ */
+#define INTEL_GPP_BASE(first_of_community, start_of_group, end_of_group,\
+			group_pad_base)					\
+	{								\
+		.first_pad = (start_of_group) - (first_of_community),	\
+		.size = (end_of_group) - (start_of_group) + 1,		\
+		.pad_base = (group_pad_base),				\
 	}
 
 /*
+ * A pad base of -1 indicates that this group uses contiguous numbering
+ * and a pad base should not be used for this group.
+ */
+#define PAD_BASE_NONE	-1
+
+/* The common/default group numbering is contiguous */
+#define INTEL_GPP(first_of_community, start_of_group, end_of_group)	\
+	INTEL_GPP_BASE(first_of_community, start_of_group, end_of_group,\
+		       PAD_BASE_NONE)
+
+/*
  * Following should be defined in soc/gpio.h
  * GPIO_MISCCFG - offset to GPIO MISCCFG Register
  *
@@ -67,6 +84,12 @@
 	int		first_pad; /* offset of first pad of the group relative
 	to the community */
 	unsigned int	size; /* Size of the group */
+	/*
+	 * This is the starting pin number for the pads in this group, if
+	 * if the pins are not contiguous across groups.  Most groups will
+	 * have this set to PAD_BASE_NONE and use contiguous numbering.
+	 */
+	int		pad_base;
 };
 
 /* This structure will be used to describe a community or each group within a

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I25f73df45ffae18c5721a00ca230a6b07c250bab
Gerrit-Change-Number: 30131
Gerrit-PatchSet: 1
Gerrit-Owner: Duncan Laurie <dlaurie at chromium.org>
Gerrit-MessageType: newchange
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