<p>Duncan Laurie has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/c/coreboot/+/30131">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/common: Add support for GPIO group pad base<br><br>In some situations the GPIO pad numbers used by the OS are not<br>contiguous and coreboot must provide a way for ACPI to provide<br>the expected GPIO number to the OS.<br><br>To do this each GPIO group can now have a pad base value, which<br>will be used as the starting pin number for this group and it<br>is added to the relative pin number of this GPIO to compute the<br>ACPI pin number for a particular GPIO.<br><br>By default this change has no effect because the existing uses<br>of INTEL_GPP() will set the pad base to PAD_BASE_NONE and the<br>GPIO number is used as the ACPI pin number without translation.<br><br>BUG=b:120686247<br>TEST=tested on a sarien(cannonlake) board<br><br>Change-Id: I25f73df45ffae18c5721a00ca230a6b07c250bab<br>Signed-off-by: Duncan Laurie <dlaurie@google.com><br>---<br>M src/soc/intel/common/block/gpio/gpio.c<br>M src/soc/intel/common/block/include/intelblocks/gpio.h<br>2 files changed, 45 insertions(+), 6 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/30131/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/common/block/gpio/gpio.c b/src/soc/intel/common/block/gpio/gpio.c</span><br><span>index 9b6ca7e..79cc573 100644</span><br><span>--- a/src/soc/intel/common/block/gpio/gpio.c</span><br><span>+++ b/src/soc/intel/common/block/gpio/gpio.c</span><br><span>@@ -397,10 +397,26 @@</span><br><span> </span><br><span> uint16_t gpio_acpi_pin(gpio_t gpio_num)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- if (!IS_ENABLED(CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_MULTI_ACPI_DEVICES))</span><br><span style="color: hsl(120, 100%, 40%);">+ const struct pad_community *comm;</span><br><span style="color: hsl(120, 100%, 40%);">+ size_t group, pin;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (IS_ENABLED(CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_MULTI_ACPI_DEVICES))</span><br><span style="color: hsl(120, 100%, 40%);">+ return relative_pad_in_comm(gpio_get_community(gpio_num),</span><br><span style="color: hsl(120, 100%, 40%);">+ gpio_num);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ comm = gpio_get_community(gpio_num);</span><br><span style="color: hsl(120, 100%, 40%);">+ pin = relative_pad_in_comm(comm, gpio_num);</span><br><span style="color: hsl(120, 100%, 40%);">+ group = gpio_group_index(comm, pin);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* If pad base is not set then use GPIO number as ACPI pin number. */</span><br><span style="color: hsl(120, 100%, 40%);">+ if (comm->groups[group].pad_base == PAD_BASE_NONE)</span><br><span> return gpio_num;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- return relative_pad_in_comm(gpio_get_community(gpio_num), gpio_num);</span><br><span style="color: hsl(120, 100%, 40%);">+ /*</span><br><span style="color: hsl(120, 100%, 40%);">+ * If this group has a non-zero pad base then compute the ACPI pin</span><br><span style="color: hsl(120, 100%, 40%);">+ * number from the pad base and the relative pad in the group.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+ return comm->groups[group].pad_base + gpio_within_group(comm, pin);</span><br><span> }</span><br><span> </span><br><span> static void print_gpi_status(const struct gpi_status *sts)</span><br><span>diff --git a/src/soc/intel/common/block/include/intelblocks/gpio.h b/src/soc/intel/common/block/include/intelblocks/gpio.h</span><br><span>index 4e26db3..b6112d4 100644</span><br><span>--- a/src/soc/intel/common/block/include/intelblocks/gpio.h</span><br><span>+++ b/src/soc/intel/common/block/include/intelblocks/gpio.h</span><br><span>@@ -23,13 +23,30 @@</span><br><span> #ifndef __ACPI__</span><br><span> #include <types.h></span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#define INTEL_GPP(first_of_community, start_of_group, end_of_group) \</span><br><span style="color: hsl(0, 100%, 40%);">- { \</span><br><span style="color: hsl(0, 100%, 40%);">- .first_pad = (start_of_group) - (first_of_community), \</span><br><span style="color: hsl(0, 100%, 40%);">- .size = (end_of_group) - (start_of_group) + 1, \</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * GPIO numbers may not be contiguous and instead will have a different</span><br><span style="color: hsl(120, 100%, 40%);">+ * starting pin number for each pad group.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+#define INTEL_GPP_BASE(first_of_community, start_of_group, end_of_group,\</span><br><span style="color: hsl(120, 100%, 40%);">+ group_pad_base) \</span><br><span style="color: hsl(120, 100%, 40%);">+ { \</span><br><span style="color: hsl(120, 100%, 40%);">+ .first_pad = (start_of_group) - (first_of_community), \</span><br><span style="color: hsl(120, 100%, 40%);">+ .size = (end_of_group) - (start_of_group) + 1, \</span><br><span style="color: hsl(120, 100%, 40%);">+ .pad_base = (group_pad_base), \</span><br><span> }</span><br><span> </span><br><span> /*</span><br><span style="color: hsl(120, 100%, 40%);">+ * A pad base of -1 indicates that this group uses contiguous numbering</span><br><span style="color: hsl(120, 100%, 40%);">+ * and a pad base should not be used for this group.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+#define PAD_BASE_NONE -1</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* The common/default group numbering is contiguous */</span><br><span style="color: hsl(120, 100%, 40%);">+#define INTEL_GPP(first_of_community, start_of_group, end_of_group) \</span><br><span style="color: hsl(120, 100%, 40%);">+ INTEL_GPP_BASE(first_of_community, start_of_group, end_of_group,\</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_BASE_NONE)</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span> * Following should be defined in soc/gpio.h</span><br><span> * GPIO_MISCCFG - offset to GPIO MISCCFG Register</span><br><span> *</span><br><span>@@ -67,6 +84,12 @@</span><br><span> int first_pad; /* offset of first pad of the group relative</span><br><span> to the community */</span><br><span> unsigned int size; /* Size of the group */</span><br><span style="color: hsl(120, 100%, 40%);">+ /*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This is the starting pin number for the pads in this group, if</span><br><span style="color: hsl(120, 100%, 40%);">+ * if the pins are not contiguous across groups. Most groups will</span><br><span style="color: hsl(120, 100%, 40%);">+ * have this set to PAD_BASE_NONE and use contiguous numbering.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+ int pad_base;</span><br><span> };</span><br><span> </span><br><span> /* This structure will be used to describe a community or each group within a</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/c/coreboot/+/30131">change 30131</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/c/coreboot/+/30131"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-Change-Id: I25f73df45ffae18c5721a00ca230a6b07c250bab </div>
<div style="display:none"> Gerrit-Change-Number: 30131 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Duncan Laurie <dlaurie@chromium.org> </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>