[coreboot-gerrit] Change in ...coreboot[master]: mb/{intel, google}/{icelake_rvp, dragonegg}: Move cpuid(1) function int...

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30124


Change subject: mb/{intel,google}/{icelake_rvp,dragonegg}: Move cpuid(1) function into cpu common code
......................................................................

mb/{intel,google}/{icelake_rvp,dragonegg}: Move cpuid(1) function into cpu common code

This patch replaces all cpuid(1) references from icelake mainboard
with intel cpu common code library functions.

- cpu_get_cpuid() -> to get processor id (from cpuid.eax)

Change-Id: Ia12d95d911dd6ee60a3a35937264fef668ad9e35
Signed-off-by: Subrata Banik <subrata.banik at intel.com>
---
M src/mainboard/google/dragonegg/variants/baseboard/memory.c
M src/mainboard/intel/icelake_rvp/spd/spd_util.c
2 files changed, 4 insertions(+), 28 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/30124/1

diff --git a/src/mainboard/google/dragonegg/variants/baseboard/memory.c b/src/mainboard/google/dragonegg/variants/baseboard/memory.c
index c7d579b..dac8e2d 100644
--- a/src/mainboard/google/dragonegg/variants/baseboard/memory.c
+++ b/src/mainboard/google/dragonegg/variants/baseboard/memory.c
@@ -16,6 +16,7 @@
 #include <arch/cpu.h>
 #include <baseboard/variants.h>
 #include <gpio.h>
+#include <intelblocks/cpulib.h>
 #include <intelblocks/mp_init.h>
 #include <variant/gpio.h>
 
@@ -36,19 +37,6 @@
 /* Rcomp resistor */
 static const u16 rcomp_resistor[] = { 100, 100, 100 };
 
-/*
- * get processor id using cpuid eax=1
- * return value will be in EAX register
- */
-static uint32_t get_cpuid(void)
-{
-	struct cpuid_result cpuidr;
-
-	cpuidr = cpuid(1);
-
-	return cpuidr.eax;
-}
-
 void __weak variant_memory_params(struct lpddr4_config *mem_config)
 {
 	/* Rcomp target */
@@ -61,7 +49,7 @@
 	mem_config->dqs_map_size = sizeof(dqs_map);
 	mem_config->rcomp_resistor = rcomp_resistor;
 	mem_config->rcomp_resistor_size = sizeof(rcomp_resistor);
-	if (get_cpuid() == CPUID_ICELAKE_A0) {
+	if (cpu_get_cpuid() == CPUID_ICELAKE_A0) {
 		mem_config->rcomp_target = rcomp_target_es0;
 		mem_config->rcomp_target_size = sizeof(rcomp_target_es0);
 	} else {
diff --git a/src/mainboard/intel/icelake_rvp/spd/spd_util.c b/src/mainboard/intel/icelake_rvp/spd/spd_util.c
index 63b39fd..0a0dffe 100644
--- a/src/mainboard/intel/icelake_rvp/spd/spd_util.c
+++ b/src/mainboard/intel/icelake_rvp/spd/spd_util.c
@@ -15,6 +15,7 @@
 #include <arch/byteorder.h>
 #include <arch/cpu.h>
 #include <console/console.h>
+#include <intelblocks/cpulib.h>
 #include <intelblocks/mp_init.h>
 #include <stdint.h>
 #include <string.h>
@@ -111,19 +112,6 @@
 	memcpy(rcomp_ptr, RcompResistor, sizeof(RcompResistor));
 }
 
-/*
- * get processor id using cpuid eax=1
- * return value will be in EAX register
- */
-static uint32_t get_cpuid(void)
-{
-	struct cpuid_result cpuidr;
-
-	cpuidr = cpuid(1);
-
-	return cpuidr.eax;
-}
-
 void mainboard_fill_rcomp_strength_data(void *rcomp_strength_ptr)
 {
 	/* Rcomp target */
@@ -142,7 +130,7 @@
 	case icl_y_lpddr4:
 	case icl_u_lpddr4:
 	case icl_u_lpddr4_type_3:
-		if (get_cpuid() == CPUID_ICELAKE_A0)
+		if (cpu_get_cpuid() == CPUID_ICELAKE_A0)
 			memcpy(rcomp_strength_ptr, RcompTarget_LPDDR4_Ax,
 				sizeof(RcompTarget_LPDDR4_Ax));
 		else

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ia12d95d911dd6ee60a3a35937264fef668ad9e35
Gerrit-Change-Number: 30124
Gerrit-PatchSet: 1
Gerrit-Owner: Subrata Banik <subrata.banik at intel.com>
Gerrit-MessageType: newchange
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