<p>Subrata Banik has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/c/coreboot/+/30124">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mb/{intel,google}/{icelake_rvp,dragonegg}: Move cpuid(1) function into cpu common code<br><br>This patch replaces all cpuid(1) references from icelake mainboard<br>with intel cpu common code library functions.<br><br>- cpu_get_cpuid() -> to get processor id (from cpuid.eax)<br><br>Change-Id: Ia12d95d911dd6ee60a3a35937264fef668ad9e35<br>Signed-off-by: Subrata Banik <subrata.banik@intel.com><br>---<br>M src/mainboard/google/dragonegg/variants/baseboard/memory.c<br>M src/mainboard/intel/icelake_rvp/spd/spd_util.c<br>2 files changed, 4 insertions(+), 28 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/30124/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/dragonegg/variants/baseboard/memory.c b/src/mainboard/google/dragonegg/variants/baseboard/memory.c</span><br><span>index c7d579b..dac8e2d 100644</span><br><span>--- a/src/mainboard/google/dragonegg/variants/baseboard/memory.c</span><br><span>+++ b/src/mainboard/google/dragonegg/variants/baseboard/memory.c</span><br><span>@@ -16,6 +16,7 @@</span><br><span> #include <arch/cpu.h></span><br><span> #include <baseboard/variants.h></span><br><span> #include <gpio.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <intelblocks/cpulib.h></span><br><span> #include <intelblocks/mp_init.h></span><br><span> #include <variant/gpio.h></span><br><span> </span><br><span>@@ -36,19 +37,6 @@</span><br><span> /* Rcomp resistor */</span><br><span> static const u16 rcomp_resistor[] = { 100, 100, 100 };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * get processor id using cpuid eax=1</span><br><span style="color: hsl(0, 100%, 40%);">- * return value will be in EAX register</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-static uint32_t get_cpuid(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">-    struct cpuid_result cpuidr;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-     cpuidr = cpuid(1);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-      return cpuidr.eax;</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> void __weak variant_memory_params(struct lpddr4_config *mem_config)</span><br><span> {</span><br><span>      /* Rcomp target */</span><br><span>@@ -61,7 +49,7 @@</span><br><span>       mem_config->dqs_map_size = sizeof(dqs_map);</span><br><span>       mem_config->rcomp_resistor = rcomp_resistor;</span><br><span>      mem_config->rcomp_resistor_size = sizeof(rcomp_resistor);</span><br><span style="color: hsl(0, 100%, 40%);">-    if (get_cpuid() == CPUID_ICELAKE_A0) {</span><br><span style="color: hsl(120, 100%, 40%);">+        if (cpu_get_cpuid() == CPUID_ICELAKE_A0) {</span><br><span>           mem_config->rcomp_target = rcomp_target_es0;</span><br><span>              mem_config->rcomp_target_size = sizeof(rcomp_target_es0);</span><br><span>         } else {</span><br><span>diff --git a/src/mainboard/intel/icelake_rvp/spd/spd_util.c b/src/mainboard/intel/icelake_rvp/spd/spd_util.c</span><br><span>index 63b39fd..0a0dffe 100644</span><br><span>--- a/src/mainboard/intel/icelake_rvp/spd/spd_util.c</span><br><span>+++ b/src/mainboard/intel/icelake_rvp/spd/spd_util.c</span><br><span>@@ -15,6 +15,7 @@</span><br><span> #include <arch/byteorder.h></span><br><span> #include <arch/cpu.h></span><br><span> #include <console/console.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <intelblocks/cpulib.h></span><br><span> #include <intelblocks/mp_init.h></span><br><span> #include <stdint.h></span><br><span> #include <string.h></span><br><span>@@ -111,19 +112,6 @@</span><br><span>        memcpy(rcomp_ptr, RcompResistor, sizeof(RcompResistor));</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * get processor id using cpuid eax=1</span><br><span style="color: hsl(0, 100%, 40%);">- * return value will be in EAX register</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-static uint32_t get_cpuid(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">-      struct cpuid_result cpuidr;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-     cpuidr = cpuid(1);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-      return cpuidr.eax;</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> void mainboard_fill_rcomp_strength_data(void *rcomp_strength_ptr)</span><br><span> {</span><br><span>        /* Rcomp target */</span><br><span>@@ -142,7 +130,7 @@</span><br><span>     case icl_y_lpddr4:</span><br><span>   case icl_u_lpddr4:</span><br><span>   case icl_u_lpddr4_type_3:</span><br><span style="color: hsl(0, 100%, 40%);">-               if (get_cpuid() == CPUID_ICELAKE_A0)</span><br><span style="color: hsl(120, 100%, 40%);">+          if (cpu_get_cpuid() == CPUID_ICELAKE_A0)</span><br><span>                     memcpy(rcomp_strength_ptr, RcompTarget_LPDDR4_Ax,</span><br><span>                            sizeof(RcompTarget_LPDDR4_Ax));</span><br><span>              else</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/c/coreboot/+/30124">change 30124</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/c/coreboot/+/30124"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-Change-Id: Ia12d95d911dd6ee60a3a35937264fef668ad9e35 </div>
<div style="display:none"> Gerrit-Change-Number: 30124 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Subrata Banik <subrata.banik@intel.com> </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>