[coreboot-gerrit] Change in ...coreboot[master]: src: Get rid of device_t
HAOUAS Elyes (Code Review)
gerrit at coreboot.org
Wed Dec 5 11:04:50 CET 2018
HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30047
Change subject: src: Get rid of device_t
......................................................................
src: Get rid of device_t
Use of device_t is deprecated.
Change-Id: Ie05869901ac33d7089e21110f46c1241f7ee731f
Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
M src/arch/arm/include/arch/pci_ops.h
M src/arch/arm64/include/arch/pci_ops.h
M src/arch/mips/include/arch/pci_ops.h
M src/arch/x86/include/arch/io.h
M src/device/pci_early.c
M src/include/device/device.h
M src/include/device/pci_ops.h
M src/include/device/smbus.h
M src/include/reg_script.h
M src/lib/reg_script.c
10 files changed, 87 insertions(+), 48 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/30047/1
diff --git a/src/arch/arm/include/arch/pci_ops.h b/src/arch/arm/include/arch/pci_ops.h
index 2e2661b..533ad80 100644
--- a/src/arch/arm/include/arch/pci_ops.h
+++ b/src/arch/arm/include/arch/pci_ops.h
@@ -21,9 +21,6 @@
typedef u32 pci_devfn_t;
#ifdef __SIMPLE_DEVICE__
-// FIXME: Use of device_t is deprecated
-typedef pci_devfn_t device_t;
-
u8 pci_read_config8(pci_devfn_t dev, unsigned int where);
u16 pci_read_config16(pci_devfn_t dev, unsigned int where);
u32 pci_read_config32(pci_devfn_t dev, unsigned int where);
diff --git a/src/arch/arm64/include/arch/pci_ops.h b/src/arch/arm64/include/arch/pci_ops.h
index e6d5206..32e7601 100644
--- a/src/arch/arm64/include/arch/pci_ops.h
+++ b/src/arch/arm64/include/arch/pci_ops.h
@@ -21,9 +21,6 @@
typedef u32 pci_devfn_t;
#ifdef __SIMPLE_DEVICE__
-// FIXME: Use of device_t is deprecated
-typedef pci_devfn_t device_t;
-
u8 pci_read_config8(pci_devfn_t dev, unsigned int where);
u16 pci_read_config16(pci_devfn_t dev, unsigned int where);
u32 pci_read_config32(pci_devfn_t dev, unsigned int where);
diff --git a/src/arch/mips/include/arch/pci_ops.h b/src/arch/mips/include/arch/pci_ops.h
index 5fef126..f57befa 100644
--- a/src/arch/mips/include/arch/pci_ops.h
+++ b/src/arch/mips/include/arch/pci_ops.h
@@ -21,9 +21,6 @@
typedef u32 pci_devfn_t;
#ifdef __SIMPLE_DEVICE__
-// FIXME: Use of device_t is deprecated
-typedef pci_devfn_t device_t;
-
u8 pci_read_config8(pci_devfn_t dev, unsigned int where);
u16 pci_read_config16(pci_devfn_t dev, unsigned int where);
u32 pci_read_config32(pci_devfn_t dev, unsigned int where);
diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h
index 1b0fdb0..f47973e 100644
--- a/src/arch/x86/include/arch/io.h
+++ b/src/arch/x86/include/arch/io.h
@@ -18,8 +18,6 @@
#include <stdint.h>
#include <rules.h>
-/* FIXME: Sources for romstage still use device_t. */
-/* Use pci_devfn_t or pnp_devfn_t instead */
typedef u32 pci_devfn_t;
typedef u32 pnp_devfn_t;
@@ -256,10 +254,6 @@
#define PNP_DEV(PORT, FUNC) (((PORT) << 8) | (FUNC))
-/* FIXME: Sources for romstage still use device_t. */
-/* Use pci_devfn_t or pnp_devfn_t instead */
-typedef u32 device_t;
-
/* FIXME: We need to make the coreboot to run at 64bit mode, So when read/write
* memory above 4G, We don't need to set %fs, and %gs anymore
* Before that We need to use %gs, and leave %fs to other RAM access
diff --git a/src/device/pci_early.c b/src/device/pci_early.c
index 6baebe0..ff481bc 100644
--- a/src/device/pci_early.c
+++ b/src/device/pci_early.c
@@ -13,14 +13,12 @@
* GNU General Public License for more details.
*/
-#define __SIMPLE_DEVICE__
-
#include <arch/io.h>
#include <device/pci.h>
#include <device/pci_def.h>
#include <delay.h>
-#ifdef __PRE_RAM__
+#ifdef __SIMPLE_DEVICE__
unsigned pci_find_next_capability(pci_devfn_t dev, unsigned cap, unsigned last)
{
unsigned pos = 0;
@@ -68,12 +66,16 @@
{
return pci_find_next_capability(dev, cap, 0);
}
-#endif /* __PRE_RAM__ */
+#endif /* __SIMPLE_DEVICE__ */
#if IS_ENABLED(CONFIG_EARLY_PCI_BRIDGE)
-static void pci_bridge_reset_secondary(device_t p2p_bridge)
+#ifdef __SIMPLE_DEVICE__
+static void pci_bridge_reset_secondary(pci_devfn_t p2p_bridge)
+#else
+static void pci_bridge_reset_secondary(struct device *p2p_bridge)
+#endif
{
u16 reg16;
@@ -90,7 +92,11 @@
pci_write_config16(p2p_bridge, PCI_BRIDGE_CONTROL, reg16);
}
-static void pci_bridge_set_secondary(device_t p2p_bridge, u8 secondary)
+#ifdef __SIMPLE_DEVICE__
+static void pci_bridge_set_secondary(pci_devfn_t p2p_bridge, u8 secondary)
+#else
+static void pci_bridge_set_secondary(struct device *p2p_bridge, u8 secondary)
+#endif
{
/* Disable config transaction forwarding. */
pci_write_config8(p2p_bridge, PCI_SECONDARY_BUS, 0x00);
@@ -100,7 +106,11 @@
pci_write_config8(p2p_bridge, PCI_SUBORDINATE_BUS, secondary);
}
-static void pci_bridge_set_mmio(device_t p2p_bridge, u32 base, u32 size)
+#ifdef __SIMPLE_DEVICE__
+static void pci_bridge_set_mmio(pci_devfn_t p2p_bridge, u32 base, u32 size)
+#else
+static void pci_bridge_set_mmio(struct device *p2p_bridge, u32 base, u32 size)
+#endif
{
u16 reg16;
diff --git a/src/include/device/device.h b/src/include/device/device.h
index 6713c94..c2f8ece 100644
--- a/src/include/device/device.h
+++ b/src/include/device/device.h
@@ -14,14 +14,9 @@
#include <rules.h>
#include <device/resource.h>
#include <device/path.h>
-
-struct device;
-
-#ifndef __SIMPLE_DEVICE__
-typedef struct device *device_t;
-#endif
#include <arch/io.h>
+struct device;
struct pci_operations;
struct pci_bus_operations;
struct i2c_bus_operations;
diff --git a/src/include/device/pci_ops.h b/src/include/device/pci_ops.h
index 5e60e8d..54284f5 100644
--- a/src/include/device/pci_ops.h
+++ b/src/include/device/pci_ops.h
@@ -15,33 +15,49 @@
#endif
-/*
- * Use device_t here as the functions are to be used with either
- * __SIMPLE_DEVICE__ defined or undefined.
- */
+#ifdef __SIMPLE_DEVICE__
static __always_inline
-void pci_or_config8(device_t dev, unsigned int where, u8 ormask)
+void pci_or_config8(pci_devfn_t dev, unsigned int where, u8 ormask)
+#else
+static __always_inline
+void pci_or_config8(struct device *dev, unsigned int where, u8 ormask)
+#endif
{
u8 value = pci_read_config8(dev, where);
pci_write_config8(dev, where, value | ormask);
}
+#ifdef __SIMPLE_DEVICE__
static __always_inline
-void pci_or_config16(device_t dev, unsigned int where, u16 ormask)
+void pci_or_config16(pci_devfn_t dev, unsigned int where, u16 ormask)
+#else
+static __always_inline
+void pci_or_config16(struct device *dev, unsigned int where, u16 ormask)
+#endif
{
u16 value = pci_read_config16(dev, where);
pci_write_config16(dev, where, value | ormask);
}
+#ifdef __SIMPLE_DEVICE__
static __always_inline
-void pci_or_config32(device_t dev, unsigned int where, u32 ormask)
+void pci_or_config32(pci_devfn_t dev, unsigned int where, u32 ormask)
+#else
+static __always_inline
+void pci_or_config32(struct device *dev, unsigned int where, u32 ormask)
+#endif
{
u32 value = pci_read_config32(dev, where);
pci_write_config32(dev, where, value | ormask);
}
+#ifdef __SIMPLE_DEVICE__
static __always_inline
-void pci_update_config8(device_t dev, int reg, u8 mask, u8 or)
+void pci_update_config8(pci_devfn_t dev, int reg, u8 mask, u8 or)
+#else
+static __always_inline
+void pci_update_config8(struct device *dev, int reg, u8 mask, u8 or)
+#endif
{
u8 reg8;
@@ -51,8 +67,13 @@
pci_write_config8(dev, reg, reg8);
}
+#ifdef __SIMPLE_DEVICE__
static __always_inline
-void pci_update_config16(device_t dev, int reg, u16 mask, u16 or)
+void pci_update_config16(pci_devfn_t dev, int reg, u16 mask, u16 or)
+#else
+static __always_inline
+void pci_update_config16(struct device *dev, int reg, u16 mask, u16 or)
+#endif
{
u16 reg16;
@@ -62,8 +83,13 @@
pci_write_config16(dev, reg, reg16);
}
+#ifdef __SIMPLE_DEVICE__
static __always_inline
-void pci_update_config32(device_t dev, int reg, u32 mask, u32 or)
+void pci_update_config32(pci_devfn_t dev, int reg, u32 mask, u32 or)
+#else
+static __always_inline
+void pci_update_config32(struct device *dev, int reg, u32 mask, u32 or)
+#endif
{
u32 reg32;
diff --git a/src/include/device/smbus.h b/src/include/device/smbus.h
index 639e938..621300d 100644
--- a/src/include/device/smbus.h
+++ b/src/include/device/smbus.h
@@ -51,9 +51,13 @@
return i2c_dev_writeb_at(dev, addr, val);
}
-int smbus_block_read(device_t dev, u8 cmd, u8 bytes, u8 *buffer);
-int smbus_block_write(device_t dev, u8 cmd, u8 bytes, const u8 *buffer);
-
+#ifdef __SIMPLE_DEVICE__
+int smbus_block_read(pci_devfn_t dev, u8 cmd, u8 bytes, u8 *buffer);
+int smbus_block_write(pci_devfn_t dev, u8 cmd, u8 bytes, const u8 *buffer);
+#else
+int smbus_block_read(struct device *dev, u8 cmd, u8 bytes, u8 *buffer);
+int smbus_block_write(struct device *dev, u8 cmd, u8 bytes, const u8 *buffer);
+#endif
#if IS_ENABLED(CONFIG_SMBUS_HAS_AUX_CHANNELS)
void smbus_switch_to_channel(uint8_t channel_number);
uint8_t smbus_get_current_channel(void);
diff --git a/src/include/reg_script.h b/src/include/reg_script.h
index 116dd92..28fc82d 100644
--- a/src/include/reg_script.h
+++ b/src/include/reg_script.h
@@ -30,8 +30,6 @@
* are employed:
* - Chaining of tables that allow runtime tables to chain to compile-time
* tables.
- * - Notion of current device (device_t) being worked on. This allows for
- * PCI config, io, and mmio on a particular device's resources.
*
* Note that when using REG_SCRIPT_COMMAND_NEXT there is an implicit push
* and pop of the context. A chained reg_script inherits the previous
@@ -87,13 +85,21 @@
union {
uint32_t id;
const struct reg_script *next;
- device_t dev;
+#ifdef __SIMPLE_DEVICE__
+ pci_devfn_t dev;
+#else
+ struct device *dev;
+#endif
unsigned int res_index;
};
};
struct reg_script_context {
- device_t dev;
+#ifdef __SIMPLE_DEVICE__
+ pci_devfn_t dev;
+#else
+ struct device *dev;
+#endif
struct resource *res;
const struct reg_script *step;
uint8_t display_state; /* Only modified by reg_script_run_step */
@@ -437,6 +443,10 @@
_REG_SCRIPT_ENCODE_RAW(REG_SCRIPT_COMMAND_END, 0, 0, 0, 0, 0, 0, 0)
void reg_script_run(const struct reg_script *script);
-void reg_script_run_on_dev(device_t dev, const struct reg_script *step);
+#ifdef __SIMPLE_DEVICE__
+void reg_script_run_on_dev(pci_devfn_t dev, const struct reg_script *step);
+#else
+void reg_script_run_on_dev(struct device *dev, const struct reg_script *step);
+#endif
#endif /* REG_SCRIPT_H */
diff --git a/src/lib/reg_script.c b/src/lib/reg_script.c
index e84c137..926a659 100644
--- a/src/lib/reg_script.c
+++ b/src/lib/reg_script.c
@@ -40,8 +40,13 @@
#define EMPTY_DEV NULL
#endif
+#ifdef __SIMPLE_DEVICE__
static inline void reg_script_set_dev(struct reg_script_context *ctx,
- device_t dev)
+ pci_devfn_t dev)
+#else
+static inline void reg_script_set_dev(struct reg_script_context *ctx,
+ struct device *dev)
+#endif
{
ctx->dev = dev;
ctx->res = NULL;
@@ -677,7 +682,11 @@
reg_script_run_with_context(&ctx);
}
-void reg_script_run_on_dev(device_t dev, const struct reg_script *step)
+#ifdef __SIMPLE_DEVICE__
+void reg_script_run_on_dev(pci_devfn_t dev, const struct reg_script *step)
+#else
+void reg_script_run_on_dev(struct device *dev, const struct reg_script *step)
+#endif
{
struct reg_script_context ctx;
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ie05869901ac33d7089e21110f46c1241f7ee731f
Gerrit-Change-Number: 30047
Gerrit-PatchSet: 1
Gerrit-Owner: HAOUAS Elyes <ehaouas at noos.fr>
Gerrit-Reviewer: HAOUAS Elyes <ehaouas at noos.fr>
Gerrit-Reviewer: Julius Werner <jwerner at chromium.org>
Gerrit-MessageType: newchange
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