[coreboot-gerrit] Change in ...coreboot[master]: sb/intel/lynxpoint: Make the finalise handler common

Patrick Georgi (Code Review) gerrit at coreboot.org
Mon Dec 3 14:09:02 CET 2018


Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/29975 )

Change subject: sb/intel/lynxpoint: Make the finalise handler common
......................................................................

sb/intel/lynxpoint: Make the finalise handler common

The ASRock H81M-HDS doesn't implement a finalise handler. To fix
this, and reduce code duplication in the process, make a common
implementation. There should be no functional change to boards with
existing finalise handlers, since the code is identical among them and
the new, common implementation.

Tested on an ASRock H81M-HDS. The finalise handler works.

Change-Id: I13b581a2219288019a4e0c9e618db3ac7c3c15ab
Signed-off-by: Tristan Corrick <tristan at corrick.kiwi>
Reviewed-on: https://review.coreboot.org/c/29975
Tested-by: build bot (Jenkins) <no-reply at coreboot.org>
Reviewed-by: Nico Huber <nico.h at gmx.de>
---
M src/mainboard/google/beltino/smihandler.c
M src/mainboard/google/slippy/smihandler.c
M src/mainboard/intel/baskingridge/mainboard_smi.c
M src/southbridge/intel/lynxpoint/smihandler.c
4 files changed, 15 insertions(+), 60 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Nico Huber: Looks good to me, approved



diff --git a/src/mainboard/google/beltino/smihandler.c b/src/mainboard/google/beltino/smihandler.c
index 3d9324d..074a3e9 100644
--- a/src/mainboard/google/beltino/smihandler.c
+++ b/src/mainboard/google/beltino/smihandler.c
@@ -27,29 +27,6 @@
 #include <superio/ite/it8772f/it8772f.h>
 #include "onboard.h"
 
-static int mainboard_finalized = 0;
-
-int mainboard_smi_apmc(u8 apmc)
-{
-	switch (apmc) {
-	case APM_CNT_FINALIZE:
-		if (mainboard_finalized) {
-			printk(BIOS_DEBUG, "SMI#: Already finalized\n");
-			return 0;
-		}
-
-		intel_pch_finalize_smm();
-		intel_northbridge_haswell_finalize_smm();
-		intel_cpu_haswell_finalize_smm();
-
-		mainboard_finalized = 1;
-		break;
-	default:
-		break;
-	}
-	return 0;
-}
-
 void mainboard_smi_sleep(u8 slp_typ)
 {
 	switch (slp_typ) {
diff --git a/src/mainboard/google/slippy/smihandler.c b/src/mainboard/google/slippy/smihandler.c
index 3480147..bab764a 100644
--- a/src/mainboard/google/slippy/smihandler.c
+++ b/src/mainboard/google/slippy/smihandler.c
@@ -119,24 +119,9 @@
 	while (google_chromeec_get_event() != 0);
 }
 
-
-static int mainboard_finalized = 0;
-
 int mainboard_smi_apmc(u8 apmc)
 {
 	switch (apmc) {
-	case APM_CNT_FINALIZE:
-		if (mainboard_finalized) {
-			printk(BIOS_DEBUG, "SMI#: Already finalized\n");
-			return 0;
-		}
-
-		intel_pch_finalize_smm();
-		intel_northbridge_haswell_finalize_smm();
-		intel_cpu_haswell_finalize_smm();
-
-		mainboard_finalized = 1;
-		break;
 	case APM_CNT_ACPI_ENABLE:
 		google_chromeec_set_smi_mask(0);
 		/* Clear all pending events */
diff --git a/src/mainboard/intel/baskingridge/mainboard_smi.c b/src/mainboard/intel/baskingridge/mainboard_smi.c
index 229085d..0fd0639 100644
--- a/src/mainboard/intel/baskingridge/mainboard_smi.c
+++ b/src/mainboard/intel/baskingridge/mainboard_smi.c
@@ -46,25 +46,3 @@
 		break;
 	}
 }
-
-
-static int mainboard_finalized = 0;
-
-int mainboard_smi_apmc(u8 apmc)
-{
-	switch (apmc) {
-	case APM_CNT_FINALIZE:
-		if (mainboard_finalized) {
-			printk(BIOS_DEBUG, "SMI#: Already finalized\n");
-			return 0;
-		}
-
-		intel_pch_finalize_smm();
-		intel_northbridge_haswell_finalize_smm();
-		intel_cpu_haswell_finalize_smm();
-
-		mainboard_finalized = 1;
-		break;
-	}
-	return 0;
-}
diff --git a/src/southbridge/intel/lynxpoint/smihandler.c b/src/southbridge/intel/lynxpoint/smihandler.c
index 87848c2..12e5ea2 100644
--- a/src/southbridge/intel/lynxpoint/smihandler.c
+++ b/src/southbridge/intel/lynxpoint/smihandler.c
@@ -25,6 +25,8 @@
 #include <elog.h>
 #include <halt.h>
 #include <pc80/mc146818rtc.h>
+#include <northbridge/intel/haswell/haswell.h>
+#include <cpu/intel/haswell/haswell.h>
 #include "pch.h"
 
 #include "nvs.h"
@@ -270,11 +272,24 @@
 {
 	u8 reg8;
 	em64t101_smm_state_save_area_t *state;
+	static int chipset_finalized = 0;
 
 	/* Emulate B2 register as the FADT / Linux expects it */
 
 	reg8 = inb(APM_CNT);
 	switch (reg8) {
+	case APM_CNT_FINALIZE:
+		if (chipset_finalized) {
+			printk(BIOS_DEBUG, "SMI#: Already finalized\n");
+			return;
+		}
+
+		intel_pch_finalize_smm();
+		intel_northbridge_haswell_finalize_smm();
+		intel_cpu_haswell_finalize_smm();
+
+		chipset_finalized = 1;
+		break;
 	case APM_CNT_CST_CONTROL:
 		/* Calling this function seems to cause
 		 * some kind of race condition in Linux

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I13b581a2219288019a4e0c9e618db3ac7c3c15ab
Gerrit-Change-Number: 29975
Gerrit-PatchSet: 3
Gerrit-Owner: Tristan Corrick <tristan at corrick.kiwi>
Gerrit-Reviewer: Nico Huber <nico.h at gmx.de>
Gerrit-Reviewer: Patrick Georgi <pgeorgi at google.com>
Gerrit-Reviewer: Patrick Rudolph <siro at das-labor.org>
Gerrit-Reviewer: Tristan Corrick <tristan at corrick.kiwi>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-MessageType: merged
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