[coreboot-gerrit] Change in coreboot[master]: riscv: update delegate

[Xiang Wang (Code Review)]

Xiang Wang has uploaded a new patch set (#2). ( https://review.coreboot.org/28356 )

Change subject: riscv: update delegate
......................................................................

riscv: update delegate

PMP may trigger an access fault. PMP operations must be in m-mode. So
access fault can't be delegate to s-mode.

Change-Id: If08220fdbb483ebf323f481ab0c7b012ac7a196c
Signed-off-by: Xiang Wang <wxjstz at 126.com>
---
M src/arch/riscv/virtual_memory.c
1 file changed, 0 insertions(+), 3 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/28356/2
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: If08220fdbb483ebf323f481ab0c7b012ac7a196c
Gerrit-Change-Number: 28356
Gerrit-PatchSet: 2
Gerrit-Owner: Xiang Wang <wxjstz at 126.com>
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