[coreboot-gerrit] Change in coreboot[master]: soc/intel/apollolake: Make eMMC max speed configurable

Mario Scheithauer (Code Review) gerrit at coreboot.org
Thu Aug 23 11:46:47 CEST 2018


Mario Scheithauer has uploaded this change for review. ( https://review.coreboot.org/28282


Change subject: soc/intel/apollolake: Make eMMC max speed configurable
......................................................................

soc/intel/apollolake: Make eMMC max speed configurable

The eMMC maximum speed is set to HS400 mode per default. To increase the
lifetime of the circuit, it is necessary to reduce the eMMC speed.

Change-Id: I6fa5eb56a0593e24269ef143645c506232879889
Signed-off-by: Mario Scheithauer <mario.scheithauer at siemens.com>
---
M src/soc/intel/apollolake/chip.c
M src/soc/intel/apollolake/chip.h
2 files changed, 7 insertions(+), 2 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/28282/1

diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 83a6baa..f6595ce 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -2,7 +2,7 @@
  * This file is part of the coreboot project.
  *
  * Copyright (C) 2015 - 2017 Intel Corp.
- * Copyright (C) 2017 Siemens AG
+ * Copyright (C) 2017 - 2018 Siemens AG
  * (Written by Alexandru Gagniuc <alexandrux.gagniuc at intel.com> for Intel Corp.)
  * (Written by Andrey Petrov <andrey.petrov at intel.com> for Intel Corp.)
  *
@@ -616,6 +616,8 @@
 		silconfig->EmmcRxStrobeCntl = cfg->emmc_rx_strobe_cntl;
 	if (cfg->emmc_rx_cmd_data_cntl2 != 0)
 		silconfig->EmmcRxCmdDataCntl2 = cfg->emmc_rx_cmd_data_cntl2;
+	if (cfg->emmc_host_max_speed != 0)
+		silconfig->eMMCHostMaxSpeed = cfg->emmc_host_max_speed;
 
 	silconfig->LPSS_S0ixEnable = cfg->lpss_s0ix_enable;
 
diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h
index 61ddeda..f1384ad 100644
--- a/src/soc/intel/apollolake/chip.h
+++ b/src/soc/intel/apollolake/chip.h
@@ -2,7 +2,7 @@
  * This file is part of the coreboot project.
  *
  * Copyright (C) 2015 Intel Corp.
- * Copyright (C) 2017 Siemens AG
+ * Copyright (C) 2017 - 2018 Siemens AG
  * (Written by Alexandru Gagniuc <alexandrux.gagniuc at intel.com> for Intel Corp.)
  *
  * This program is free software; you can redistribute it and/or modify
@@ -93,6 +93,9 @@
 	 */
 	uint32_t emmc_rx_cmd_data_cntl2;
 
+	/* Select the eMMC max Speed allowed. */
+	uint8_t emmc_host_max_speed;
+
 	/* Specifies on which IRQ the SCI will internally appear. */
 	uint8_t sci_irq;
 

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I6fa5eb56a0593e24269ef143645c506232879889
Gerrit-Change-Number: 28282
Gerrit-PatchSet: 1
Gerrit-Owner: Mario Scheithauer <mario.scheithauer at siemens.com>
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