[coreboot-gerrit] Change in coreboot[master]: riscv: add support for supervisor binary interface (SBI)

[Xiang Wang (Code Review)]

Hello build bot (Jenkins), 

I'd like you to reexamine a change. Please visit

    https://review.coreboot.org/28096

to look at the new patch set (#3).

Change subject: riscv: add support for supervisor binary interface (SBI)
......................................................................

riscv: add support for supervisor binary interface (SBI)

SBI is runtime service for OS. For an introduction, please refer to
https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.md

Change-Id: Ib6c1f21d2f085f02208305dc4e3a0f970d400c27
Signed-off-by: Xiang Wang <wxjstz at 126.com>
---
M src/arch/riscv/Makefile.inc
A src/arch/riscv/include/sbi.h
A src/arch/riscv/sbi.c
M src/arch/riscv/trap_handler.c
4 files changed, 167 insertions(+), 0 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/28096/3
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: Ib6c1f21d2f085f02208305dc4e3a0f970d400c27
Gerrit-Change-Number: 28096
Gerrit-PatchSet: 3
Gerrit-Owner: Xiang Wang <wxjstz at 126.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
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