[coreboot-gerrit] Change in coreboot[master]: soc/intel/common: add more msr defines
Matt Delco (Code Review)
gerrit at coreboot.org
Mon Aug 13 23:04:47 CEST 2018
Matt Delco has uploaded this change for review. ( https://review.coreboot.org/28067
Change subject: soc/intel/common: add more msr defines
......................................................................
soc/intel/common: add more msr defines
This change adds some MSRs that are needed in a subsequent change to add
support for Continuous Performance Control.
Change-Id: Id4ecff1bc5eedaa90b41de526b9a2e61992ac296
Signed-off-by: Matt Delco <delco at chromium.org>
---
M src/soc/intel/common/block/include/intelblocks/msr.h
1 file changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/28067/1
diff --git a/src/soc/intel/common/block/include/intelblocks/msr.h b/src/soc/intel/common/block/include/intelblocks/msr.h
index e1fc431..e588434 100644
--- a/src/soc/intel/common/block/include/intelblocks/msr.h
+++ b/src/soc/intel/common/block/include/intelblocks/msr.h
@@ -37,6 +37,8 @@
#define MSR_BIOS_UPGD_TRIG 0x7a
#define SGX_ACTIVATE_BIT (1)
#define MSR_PMG_IO_CAPTURE_BASE 0xe4
+#define MSR_MPERF 0xe7
+#define MSR_APERF 0xe8
#define MSR_POWER_MISC 0x120
#define ENABLE_IA_UNTRUSTED (1 << 6)
#define FLUSH_DL1_L2 (1 << 8)
@@ -118,6 +120,10 @@
#define PKG_POWER_LIMIT_TIME_MASK (0x7f)
#define PKG_POWER_LIMIT_DUTYCYCLE_SHIFT 24
#define PKG_POWER_LIMIT_DUTYCYCLE_MASK (0x7f)
+#define MSR_PM_ENABLE 0x770
+#define MSR_HWP_CAPABILITIES 0x771
+#define MSR_HWP_REQUEST 0x774
+#define MSR_HWP_STATUS 0x770
/* SMM save state MSRs */
#define SMBASE_MSR 0xc20
#define IEDBASE_MSR 0xc22
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Id4ecff1bc5eedaa90b41de526b9a2e61992ac296
Gerrit-Change-Number: 28067
Gerrit-PatchSet: 1
Gerrit-Owner: Matt Delco <delco at chromium.org>
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