[coreboot-gerrit] Change in coreboot[master]: mainboard/opencellular/elgon: Add mainboard support
Patrick Rudolph (Code Review)
gerrit at coreboot.org
Sat Aug 11 09:49:39 CEST 2018
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/28024 )
Change subject: mainboard/opencellular/elgon: Add mainboard support
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Patch Set 5:
(3 comments)
https://review.coreboot.org/#/c/28024/5/src/mainboard/opencellular/elgon/Makefile.inc
File src/mainboard/opencellular/elgon/Makefile.inc:
https://review.coreboot.org/#/c/28024/5/src/mainboard/opencellular/elgon/Makefile.inc@35
PS5, Line 35: gbcv2.dtb
Actually it must be named sff8104-linux.dtb, see soc.c
I'll remove the devicetree code from ATF as we don't need it at all, and than we don't need to include it into the CBFS.
https://review.coreboot.org/#/c/28024/5/src/mainboard/opencellular/elgon/gbcv2.dts
File src/mainboard/opencellular/elgon/gbcv2.dts:
https://review.coreboot.org/#/c/28024/5/src/mainboard/opencellular/elgon/gbcv2.dts@195
PS5, Line 195: serial at 87e02a000000
I think there are only two UARTs exposed. The other entries could be removed.
https://review.coreboot.org/#/c/28024/5/src/mainboard/opencellular/elgon/vboot.fmd
File src/mainboard/opencellular/elgon/vboot.fmd:
https://review.coreboot.org/#/c/28024/5/src/mainboard/opencellular/elgon/vboot.fmd@2
PS5, Line 2: 0x63d4c0
Align to a supported flash protection range. 8 or 4 MiB.
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Gerrit-Project: coreboot
Gerrit-Branch: master
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Gerrit-Change-Id: I9b809306cc48facbade5dc63846c4532b397e0b5
Gerrit-Change-Number: 28024
Gerrit-PatchSet: 5
Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki at gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-CC: Patrick Rudolph <siro at das-labor.org>
Gerrit-Comment-Date: Sat, 11 Aug 2018 07:49:39 +0000
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