[coreboot-gerrit] Change in coreboot[master]: mb/google/poppy/variant/nami: Create TSR2 on DPTF

TH Lin (Code Review) gerrit at coreboot.org
Fri Aug 10 09:18:48 CEST 2018


TH Lin has uploaded this change for review. ( https://review.coreboot.org/27999


Change subject: mb/google/poppy/variant/nami: Create TSR2 on DPTF
......................................................................

mb/google/poppy/variant/nami: Create TSR2 on DPTF

Add TSR2 DART/DTRT package

BUG=b:110451144
BRANCH=nami
TEST=emerge-nami coreboot chromeos-bootimage
Test image with dptf.dv

Change-Id: I3328e17328415f5ebdcf84263e5456e11e55f769
Signed-off-by: T.H. Lin <t.h_lin at quanta.corp-partner.google.com>
---
M src/mainboard/google/poppy/variants/nami/include/variant/acpi/dptf.asl
1 file changed, 17 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/27999/1

diff --git a/src/mainboard/google/poppy/variants/nami/include/variant/acpi/dptf.asl b/src/mainboard/google/poppy/variants/nami/include/variant/acpi/dptf.asl
index 614865a..4f2dda6 100644
--- a/src/mainboard/google/poppy/variants/nami/include/variant/acpi/dptf.asl
+++ b/src/mainboard/google/poppy/variants/nami/include/variant/acpi/dptf.asl
@@ -41,6 +41,16 @@
 #define DPTF_TSR1_ACTIVE_AC3    42
 #define DPTF_TSR1_ACTIVE_AC4    39
 
+#define DPTF_TSR2_SENSOR_ID	2
+#define DPTF_TSR2_SENSOR_NAME	"Thermal_Sensor_Remote_CPU"
+#define DPTF_TSR2_PASSIVE	75
+#define DPTF_TSR2_CRITICAL	125
+#define DPTF_TSR2_ACTIVE_AC0    50
+#define DPTF_TSR2_ACTIVE_AC1    47
+#define DPTF_TSR2_ACTIVE_AC2    45
+#define DPTF_TSR2_ACTIVE_AC3    42
+#define DPTF_TSR2_ACTIVE_AC4    39
+
 #define DPTF_ENABLE_CHARGER
 #define DPTF_ENABLE_FAN_CONTROL
 
@@ -91,6 +101,10 @@
 	Package () {
 		\_SB.DPTF.TFN1, \_SB.DPTF.TSR1, 100, 90, 69, 56, 46, 36, 0, 0,
 			0, 0, 0
+	},
+	Package () {
+		\_SB.DPTF.TFN1, \_SB.DPTF.TSR2, 100, 90, 69, 56, 46, 36, 0, 0,
+			0, 0, 0
 	}
 })
 #endif
@@ -104,6 +118,9 @@
 
 	/* CPU Throttle Effect on TSR1 */
 	Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR1, 100, 1, 0, 0, 0, 0 },
+
+	/* CPU Throttle Effect on TSR2 */
+	Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR2, 100, 1, 0, 0, 0, 0 },
 })
 
 Name (MPPC, Package ()

-- 
To view, visit https://review.coreboot.org/27999
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I3328e17328415f5ebdcf84263e5456e11e55f769
Gerrit-Change-Number: 27999
Gerrit-PatchSet: 1
Gerrit-Owner: TH Lin <t.h_lin at quanta.corp-partner.google.com>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20180810/1083f22c/attachment.html>


More information about the coreboot-gerrit mailing list