[coreboot-gerrit] Change in coreboot[master]: cpu/amd: Rename MCA status register
Marshall Dawson (Code Review)
gerrit at coreboot.org
Tue Aug 7 16:01:26 CEST 2018
Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/27922
Change subject: cpu/amd: Rename MCA status register
......................................................................
cpu/amd: Rename MCA status register
Change the defined name of MCI_STATUS (i.e. MCi_STATUS) to reflect its
MC0_STATUS address.
Change-Id: I97d2631a186965bb8b18f544ed9648b3a71f5fb0
Signed-off-by: Marshall Dawson <marshalldawson3rd at gmail.com>
---
M src/cpu/amd/agesa/family12/model_12_init.c
M src/cpu/amd/agesa/family14/model_14_init.c
M src/cpu/amd/agesa/family15tn/model_15_init.c
M src/cpu/amd/agesa/family16kb/model_16_init.c
M src/cpu/amd/family_10h-family_15h/model_10xxx_init.c
M src/cpu/amd/pi/00630F01/model_15_init.c
M src/cpu/amd/pi/00660F01/model_15_init.c
M src/cpu/amd/pi/00730F01/model_16_init.c
M src/include/cpu/amd/amdfam15.h
M src/include/cpu/amd/amdfam16.h
M src/soc/amd/stoneyridge/cpu.c
11 files changed, 14 insertions(+), 14 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/27922/1
diff --git a/src/cpu/amd/agesa/family12/model_12_init.c b/src/cpu/amd/agesa/family12/model_12_init.c
index b4757c8..afdfb3b 100644
--- a/src/cpu/amd/agesa/family12/model_12_init.c
+++ b/src/cpu/amd/agesa/family12/model_12_init.c
@@ -27,7 +27,7 @@
#include <cpu/amd/multicore.h>
#include <cpu/amd/amdfam12.h>
-#define MCI_STATUS 0x401
+#define MC0_STATUS 0x401
static void model_12_init(struct device *dev)
{
@@ -55,7 +55,7 @@
msr.lo = 0;
msr.hi = 0;
for (i = 0; i < 5; i++) {
- wrmsr(MCI_STATUS + (i * 4), msr);
+ wrmsr(MC0_STATUS + (i * 4), msr);
}
enable_cache();
diff --git a/src/cpu/amd/agesa/family14/model_14_init.c b/src/cpu/amd/agesa/family14/model_14_init.c
index 1271a4e..257f81f 100644
--- a/src/cpu/amd/agesa/family14/model_14_init.c
+++ b/src/cpu/amd/agesa/family14/model_14_init.c
@@ -28,7 +28,7 @@
#include <arch/acpi.h>
#include <northbridge/amd/agesa/agesa_helper.h>
-#define MCI_STATUS 0x401
+#define MC0_STATUS 0x401
static void model_14_init(struct device *dev)
{
@@ -78,7 +78,7 @@
msr.lo = 0;
msr.hi = 0;
for (i = 0; i < 6; i++) {
- wrmsr(MCI_STATUS + (i * 4), msr);
+ wrmsr(MC0_STATUS + (i * 4), msr);
}
/* Enable the local CPU APICs */
diff --git a/src/cpu/amd/agesa/family15tn/model_15_init.c b/src/cpu/amd/agesa/family15tn/model_15_init.c
index 32dcd7b..1e0375f 100644
--- a/src/cpu/amd/agesa/family15tn/model_15_init.c
+++ b/src/cpu/amd/agesa/family15tn/model_15_init.c
@@ -75,7 +75,7 @@
msr.lo = 0;
msr.hi = 0;
for (i = 0; i < 6; i++) {
- wrmsr(MCI_STATUS + (i * 4), msr);
+ wrmsr(MC0_STATUS + (i * 4), msr);
}
/* Enable the local CPU APICs */
diff --git a/src/cpu/amd/agesa/family16kb/model_16_init.c b/src/cpu/amd/agesa/family16kb/model_16_init.c
index 73d91e7..9909793 100644
--- a/src/cpu/amd/agesa/family16kb/model_16_init.c
+++ b/src/cpu/amd/agesa/family16kb/model_16_init.c
@@ -73,7 +73,7 @@
msr.lo = 0;
msr.hi = 0;
for (i = 0; i < 6; i++) {
- wrmsr(MCI_STATUS + (i * 4), msr);
+ wrmsr(MC0_STATUS + (i * 4), msr);
}
/* Enable the local CPU APICs */
diff --git a/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c b/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c
index 562a267..61eb813 100644
--- a/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c
+++ b/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c
@@ -32,7 +32,7 @@
#include <cpu/amd/multicore.h>
#include <cpu/amd/msr.h>
-#define MCI_STATUS 0x401
+#define MC0_STATUS 0x401
static inline uint8_t is_gt_rev_d(void)
{
@@ -112,7 +112,7 @@
msr.lo = 0;
msr.hi = 0;
for (i = 0; i < 5; i++) {
- wrmsr(MCI_STATUS + (i * 4), msr);
+ wrmsr(MC0_STATUS + (i * 4), msr);
}
enable_cache();
diff --git a/src/cpu/amd/pi/00630F01/model_15_init.c b/src/cpu/amd/pi/00630F01/model_15_init.c
index 212d705..592ca4f 100644
--- a/src/cpu/amd/pi/00630F01/model_15_init.c
+++ b/src/cpu/amd/pi/00630F01/model_15_init.c
@@ -72,7 +72,7 @@
msr.lo = 0;
msr.hi = 0;
for (i = 0; i < 6; i++)
- wrmsr(MCI_STATUS + (i * 4), msr);
+ wrmsr(MC0_STATUS + (i * 4), msr);
/* Enable the local CPU APICs */
setup_lapic();
diff --git a/src/cpu/amd/pi/00660F01/model_15_init.c b/src/cpu/amd/pi/00660F01/model_15_init.c
index 941c48f..24c2aea 100644
--- a/src/cpu/amd/pi/00660F01/model_15_init.c
+++ b/src/cpu/amd/pi/00660F01/model_15_init.c
@@ -84,7 +84,7 @@
msr.lo = 0;
msr.hi = 0;
for (i = 0; i < 6; i++)
- wrmsr(MCI_STATUS + (i * 4), msr);
+ wrmsr(MC0_STATUS + (i * 4), msr);
/* Enable the local CPU APICs */
diff --git a/src/cpu/amd/pi/00730F01/model_16_init.c b/src/cpu/amd/pi/00730F01/model_16_init.c
index 747cb2e..b9e0185 100644
--- a/src/cpu/amd/pi/00730F01/model_16_init.c
+++ b/src/cpu/amd/pi/00730F01/model_16_init.c
@@ -69,7 +69,7 @@
msr.lo = 0;
msr.hi = 0;
for (i = 0; i < 6; i++)
- wrmsr(MCI_STATUS + (i * 4), msr);
+ wrmsr(MC0_STATUS + (i * 4), msr);
/* Enable the local CPU APICs */
diff --git a/src/include/cpu/amd/amdfam15.h b/src/include/cpu/amd/amdfam15.h
index 008d5da..c28ec13 100644
--- a/src/include/cpu/amd/amdfam15.h
+++ b/src/include/cpu/amd/amdfam15.h
@@ -16,7 +16,7 @@
#ifndef CPU_AMD_FAM15_H
#define CPU_AMD_FAM15_H
-#define MCI_STATUS 0x00000401
+#define MC0_STATUS 0x00000401
#define MSR_SMM_BASE 0xC0010111
#define MSR_TSEG_BASE 0xC0010112
#define MSR_SMM_MASK 0xC0010113
diff --git a/src/include/cpu/amd/amdfam16.h b/src/include/cpu/amd/amdfam16.h
index 861e518..8d8be83 100644
--- a/src/include/cpu/amd/amdfam16.h
+++ b/src/include/cpu/amd/amdfam16.h
@@ -16,7 +16,7 @@
#ifndef CPU_AMD_FAM16_H
#define CPU_AMD_FAM16_H
-#define MCI_STATUS 0x00000401
+#define MC0_STATUS 0x00000401
#define HWCR_MSR 0xC0010015
#define NB_CFG_MSR 0xC001001f
diff --git a/src/soc/amd/stoneyridge/cpu.c b/src/soc/amd/stoneyridge/cpu.c
index 4dd371c..6289174 100644
--- a/src/soc/amd/stoneyridge/cpu.c
+++ b/src/soc/amd/stoneyridge/cpu.c
@@ -126,7 +126,7 @@
msr.lo = 0;
msr.hi = 0;
for (i = 0 ; i < 6 ; i++)
- wrmsr(MCI_STATUS + (i * 4), msr);
+ wrmsr(MC0_STATUS + (i * 4), msr);
setup_lapic();
}
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I97d2631a186965bb8b18f544ed9648b3a71f5fb0
Gerrit-Change-Number: 27922
Gerrit-PatchSet: 1
Gerrit-Owner: Marshall Dawson <marshalldawson3rd at gmail.com>
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