[coreboot-gerrit] Change in coreboot[master]: src/mainboard: Fix typo
build bot (Jenkins) (Code Review)
gerrit at coreboot.org
Tue Aug 7 12:27:26 CEST 2018
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/27912 )
Change subject: src/mainboard: Fix typo
......................................................................
Patch Set 1:
(31 comments)
https://review.coreboot.org/#/c/27912/1/src/mainboard/advansus/a785e-i/resourcemap.c
File src/mainboard/advansus/a785e-i/resourcemap.c:
https://review.coreboot.org/#/c/27912/1/src/mainboard/advansus/a785e-i/resourcemap.c@122
PS1, Line 122: * This field defines the upp address bits of a 40-bit address that
line over 80 characters
https://review.coreboot.org/#/c/27912/1/src/mainboard/amd/bimini_fam10/resourcemap.c
File src/mainboard/amd/bimini_fam10/resourcemap.c:
https://review.coreboot.org/#/c/27912/1/src/mainboard/amd/bimini_fam10/resourcemap.c@123
PS1, Line 123: * This field defines the upp address bits of a 40-bit address that
line over 80 characters
https://review.coreboot.org/#/c/27912/1/src/mainboard/amd/mahogany_fam10/resourcemap.c
File src/mainboard/amd/mahogany_fam10/resourcemap.c:
https://review.coreboot.org/#/c/27912/1/src/mainboard/amd/mahogany_fam10/resourcemap.c@124
PS1, Line 124: * This field defines the upp address bits of a 40-bit address that
line over 80 characters
https://review.coreboot.org/#/c/27912/1/src/mainboard/amd/serengeti_cheetah_fam10/resourcemap.c
File src/mainboard/amd/serengeti_cheetah_fam10/resourcemap.c:
https://review.coreboot.org/#/c/27912/1/src/mainboard/amd/serengeti_cheetah_fam10/resourcemap.c@122
PS1, Line 122: * This field defines the upp address bits of a 40-bit address that
line over 80 characters
https://review.coreboot.org/#/c/27912/1/src/mainboard/amd/south_station/mainboard.c
File src/mainboard/amd/south_station/mainboard.c:
https://review.coreboot.org/#/c/27912/1/src/mainboard/amd/south_station/mainboard.c@21
PS1, Line 21: #include "SBPLATFORM.h" /* Platform Specific Definitions */
please, no space before tabs
https://review.coreboot.org/#/c/27912/1/src/mainboard/amd/tilapia_fam10/resourcemap.c
File src/mainboard/amd/tilapia_fam10/resourcemap.c:
https://review.coreboot.org/#/c/27912/1/src/mainboard/amd/tilapia_fam10/resourcemap.c@122
PS1, Line 122: * This field defines the upp address bits of a 40-bit address that
line over 80 characters
https://review.coreboot.org/#/c/27912/1/src/mainboard/amd/torpedo/gpio.h
File src/mainboard/amd/torpedo/gpio.h:
https://review.coreboot.org/#/c/27912/1/src/mainboard/amd/torpedo/gpio.h@301
PS1, Line 301: #define GPIO_189_SELECT FUNCTION1 // USED AS AC_OK RECEIVER, INPUT, low active
line over 80 characters
https://review.coreboot.org/#/c/27912/1/src/mainboard/amd/torpedo/gpio.h@302
PS1, Line 302: #define GPIO_190_SELECT FUNCTION1 // USED TO MONITER INTERRUPT FROM BATT CHARGER, INPUT
line over 80 characters
https://review.coreboot.org/#/c/27912/1/src/mainboard/amd/union_station/mainboard.c
File src/mainboard/amd/union_station/mainboard.c:
https://review.coreboot.org/#/c/27912/1/src/mainboard/amd/union_station/mainboard.c@20
PS1, Line 20: #include "SBPLATFORM.h" /* Platform Specific Definitions */
please, no space before tabs
https://review.coreboot.org/#/c/27912/1/src/mainboard/asus/kcma-d8/resourcemap.c
File src/mainboard/asus/kcma-d8/resourcemap.c:
https://review.coreboot.org/#/c/27912/1/src/mainboard/asus/kcma-d8/resourcemap.c@127
PS1, Line 127: * This field defines the upp address bits of a 40-bit address that
line over 80 characters
https://review.coreboot.org/#/c/27912/1/src/mainboard/asus/kcma-d8/resourcemap.c@382
PS1, Line 382: * This field defines the upp address bits of a 40-bit address that
line over 80 characters
https://review.coreboot.org/#/c/27912/1/src/mainboard/asus/kfsn4-dre/resourcemap.c
File src/mainboard/asus/kfsn4-dre/resourcemap.c:
https://review.coreboot.org/#/c/27912/1/src/mainboard/asus/kfsn4-dre/resourcemap.c@127
PS1, Line 127: * This field defines the upp address bits of a 40-bit address that
line over 80 characters
https://review.coreboot.org/#/c/27912/1/src/mainboard/asus/kgpe-d16/resourcemap.c
File src/mainboard/asus/kgpe-d16/resourcemap.c:
https://review.coreboot.org/#/c/27912/1/src/mainboard/asus/kgpe-d16/resourcemap.c@127
PS1, Line 127: * This field defines the upp address bits of a 40-bit address that
line over 80 characters
https://review.coreboot.org/#/c/27912/1/src/mainboard/asus/kgpe-d16/resourcemap.c@382
PS1, Line 382: * This field defines the upp address bits of a 40-bit address that
line over 80 characters
https://review.coreboot.org/#/c/27912/1/src/mainboard/asus/m4a78-em/resourcemap.c
File src/mainboard/asus/m4a78-em/resourcemap.c:
https://review.coreboot.org/#/c/27912/1/src/mainboard/asus/m4a78-em/resourcemap.c@124
PS1, Line 124: * This field defines the upp address bits of a 40-bit address that
line over 80 characters
https://review.coreboot.org/#/c/27912/1/src/mainboard/asus/m4a785-m/resourcemap.c
File src/mainboard/asus/m4a785-m/resourcemap.c:
https://review.coreboot.org/#/c/27912/1/src/mainboard/asus/m4a785-m/resourcemap.c@124
PS1, Line 124: * This field defines the upp address bits of a 40-bit address that
line over 80 characters
https://review.coreboot.org/#/c/27912/1/src/mainboard/asus/m5a88-v/resourcemap.c
File src/mainboard/asus/m5a88-v/resourcemap.c:
https://review.coreboot.org/#/c/27912/1/src/mainboard/asus/m5a88-v/resourcemap.c@122
PS1, Line 122: * This field defines the upp address bits of a 40-bit address that
line over 80 characters
https://review.coreboot.org/#/c/27912/1/src/mainboard/avalue/eax-785e/resourcemap.c
File src/mainboard/avalue/eax-785e/resourcemap.c:
https://review.coreboot.org/#/c/27912/1/src/mainboard/avalue/eax-785e/resourcemap.c@122
PS1, Line 122: * This field defines the upp address bits of a 40-bit address that
line over 80 characters
https://review.coreboot.org/#/c/27912/1/src/mainboard/gigabyte/ma785gm/resourcemap.c
File src/mainboard/gigabyte/ma785gm/resourcemap.c:
https://review.coreboot.org/#/c/27912/1/src/mainboard/gigabyte/ma785gm/resourcemap.c@124
PS1, Line 124: * This field defines the upp address bits of a 40-bit address that
line over 80 characters
https://review.coreboot.org/#/c/27912/1/src/mainboard/gigabyte/ma785gmt/resourcemap.c
File src/mainboard/gigabyte/ma785gmt/resourcemap.c:
https://review.coreboot.org/#/c/27912/1/src/mainboard/gigabyte/ma785gmt/resourcemap.c@124
PS1, Line 124: * This field defines the upp address bits of a 40-bit address that
line over 80 characters
https://review.coreboot.org/#/c/27912/1/src/mainboard/gigabyte/ma78gm/resourcemap.c
File src/mainboard/gigabyte/ma78gm/resourcemap.c:
https://review.coreboot.org/#/c/27912/1/src/mainboard/gigabyte/ma78gm/resourcemap.c@124
PS1, Line 124: * This field defines the upp address bits of a 40-bit address that
line over 80 characters
https://review.coreboot.org/#/c/27912/1/src/mainboard/iei/kino-780am2-fam10/resourcemap.c
File src/mainboard/iei/kino-780am2-fam10/resourcemap.c:
https://review.coreboot.org/#/c/27912/1/src/mainboard/iei/kino-780am2-fam10/resourcemap.c@124
PS1, Line 124: * This field defines the upp address bits of a 40-bit address that
line over 80 characters
https://review.coreboot.org/#/c/27912/1/src/mainboard/jetway/pa78vm5/resourcemap.c
File src/mainboard/jetway/pa78vm5/resourcemap.c:
https://review.coreboot.org/#/c/27912/1/src/mainboard/jetway/pa78vm5/resourcemap.c@125
PS1, Line 125: * This field defines the upp address bits of a 40-bit address that
line over 80 characters
https://review.coreboot.org/#/c/27912/1/src/mainboard/msi/ms9652_fam10/resourcemap.c
File src/mainboard/msi/ms9652_fam10/resourcemap.c:
https://review.coreboot.org/#/c/27912/1/src/mainboard/msi/ms9652_fam10/resourcemap.c@125
PS1, Line 125: * This field defines the upp address bits of a 40-bit address that
line over 80 characters
https://review.coreboot.org/#/c/27912/1/src/mainboard/siemens/mc_tcu3/ptn3460.c
File src/mainboard/siemens/mc_tcu3/ptn3460.c:
https://review.coreboot.org/#/c/27912/1/src/mainboard/siemens/mc_tcu3/ptn3460.c@117
PS1, Line 117: status = i2c_write(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR, PTN_CONFIG_OFF + 5,
line over 80 characters
https://review.coreboot.org/#/c/27912/1/src/mainboard/siemens/mc_tcu3/ptn3460.c@143
PS1, Line 143: status = i2c_write(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR, PTN_CONFIG_OFF + 5,
line over 80 characters
https://review.coreboot.org/#/c/27912/1/src/mainboard/siemens/mc_tcu3/ptn3460.c@171
PS1, Line 171: status = i2c_write(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR, PTN_CONFIG_OFF + 4,
line over 80 characters
https://review.coreboot.org/#/c/27912/1/src/mainboard/supermicro/h8dmr_fam10/resourcemap.c
File src/mainboard/supermicro/h8dmr_fam10/resourcemap.c:
https://review.coreboot.org/#/c/27912/1/src/mainboard/supermicro/h8dmr_fam10/resourcemap.c@125
PS1, Line 125: * This field defines the upp address bits of a 40-bit address that
line over 80 characters
https://review.coreboot.org/#/c/27912/1/src/mainboard/supermicro/h8qme_fam10/resourcemap.c
File src/mainboard/supermicro/h8qme_fam10/resourcemap.c:
https://review.coreboot.org/#/c/27912/1/src/mainboard/supermicro/h8qme_fam10/resourcemap.c@125
PS1, Line 125: * This field defines the upp address bits of a 40-bit address that
line over 80 characters
https://review.coreboot.org/#/c/27912/1/src/mainboard/supermicro/h8scm_fam10/resourcemap.c
File src/mainboard/supermicro/h8scm_fam10/resourcemap.c:
https://review.coreboot.org/#/c/27912/1/src/mainboard/supermicro/h8scm_fam10/resourcemap.c@124
PS1, Line 124: * This field defines the upp address bits of a 40-bit address that
line over 80 characters
https://review.coreboot.org/#/c/27912/1/src/mainboard/tyan/s2912_fam10/resourcemap.c
File src/mainboard/tyan/s2912_fam10/resourcemap.c:
https://review.coreboot.org/#/c/27912/1/src/mainboard/tyan/s2912_fam10/resourcemap.c@125
PS1, Line 125: * This field defines the upp address bits of a 40-bit address that
line over 80 characters
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: Ief6a04ccb63658b5fb03cd1d298bf00948cf7410
Gerrit-Change-Number: 27912
Gerrit-PatchSet: 1
Gerrit-Owner: Elyes HAOUAS <ehaouas at noos.fr>
Gerrit-CC: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Comment-Date: Tue, 07 Aug 2018 10:27:26 +0000
Gerrit-HasComments: Yes
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