[coreboot-gerrit] Change in coreboot[master]: nb/intel/*: Account for cbmem_top alignment

[Elyes HAOUAS (Code Review)]

Elyes HAOUAS has posted comments on this change. ( https://review.coreboot.org/27871 )

Change subject: nb/intel/*: Account for cbmem_top alignment
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Patch Set 4: Code-Review+1

tested on i945g-m4:
I'm getting Grub2 boot menu faster.

- Linux start, but can see only one CPU. dmsg: " smpboot: do_boot_cpu failed(-1) to wakeup CPU#1"
- S3 not working
- "# ./flashrom -p internal", gives : 
flashrom v0.9.7-r1711 on Linux 4.17.0-1-amd64 (x86_64)
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OK.
Error accessing high tables, 0x100000 bytes at 0x00000000cef38000
/dev/mem mmap failed: Operation not permitted
Failed getting access to coreboot high tables.
Found chipset "Intel ICH7/ICH7R". Enabling flash write... OK.
Found SST flash chip "SST49LF004A/B" (512 kB, FWH) at physical address 0xfff80000.
No operations were specified.
to solve this, I need to comment line #949 intel/i945/early_init.c

Console log: https://pastebin.com/6QQKQHa7


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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: Ifab37b0003f09a680024d5b155ab0bb157920952
Gerrit-Change-Number: 27871
Gerrit-PatchSet: 4
Gerrit-Owner: Arthur Heymans <arthur at aheymans.xyz>
Gerrit-Reviewer: Elyes HAOUAS <ehaouas at noos.fr>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Comment-Date: Tue, 07 Aug 2018 06:07:23 +0000
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