[coreboot-gerrit] Change in coreboot[master]: riscv: add suport to check machine length at runtime

[Xiang Wang (Code Review)]

Xiang Wang has uploaded a new patch set (#2). ( https://review.coreboot.org/27770 )

Change subject: riscv: add suport to check machine length at runtime
......................................................................

riscv: add suport to check machine length at runtime

Highest two bits of misa can be used to check machine length. Add code
to support this.

Change-Id: I3bab301d38ea8aabf2c70437e179287814298b25
Signed-off-by: Xiang Wang <wxjstz at 126.com>
---
M src/arch/riscv/include/arch/cpu.h
1 file changed, 12 insertions(+), 0 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/27770/2
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I3bab301d38ea8aabf2c70437e179287814298b25
Gerrit-Change-Number: 27770
Gerrit-PatchSet: 2
Gerrit-Owner: Xiang Wang <wxjstz at 126.com>
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