[coreboot-gerrit] Change in coreboot[master]: src/southbridge: Add whitespace around '=='
Elyes HAOUAS (Code Review)
gerrit at coreboot.org
Thu Apr 26 09:59:15 CEST 2018
Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/25853
Change subject: src/southbridge: Add whitespace around '=='
......................................................................
src/southbridge: Add whitespace around '=='
Change-Id: Ic81601cef841076a7548ccb3bdf0ed1b5420873e
Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
M src/southbridge/intel/common/smihandler.c
M src/southbridge/intel/common/usb_debug.c
M src/southbridge/intel/fsp_bd82x6x/smihandler.c
M src/southbridge/intel/fsp_i89xx/smihandler.c
M src/southbridge/intel/ibexpeak/smihandler.c
M src/southbridge/intel/lynxpoint/early_usb.c
M src/southbridge/intel/lynxpoint/smihandler.c
M src/southbridge/nvidia/mcp55/nic.c
M src/southbridge/sis/sis966/nic.c
M src/southbridge/sis/sis966/sis966.c
10 files changed, 15 insertions(+), 15 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/25853/1
diff --git a/src/southbridge/intel/common/smihandler.c b/src/southbridge/intel/common/smihandler.c
index 17fae11..65a1b96 100644
--- a/src/southbridge/intel/common/smihandler.c
+++ b/src/southbridge/intel/common/smihandler.c
@@ -234,11 +234,11 @@
for (node = 0; node < CONFIG_MAX_CPUS; node++) {
state = smm_get_save_state(node);
- /* Check for Synchronous IO (bit0==1) */
+ /* Check for Synchronous IO (bit0 == 1) */
if (!(state->io_misc_info & (1 << 0)))
continue;
- /* Make sure it was a write (bit4==0) */
+ /* Make sure it was a write (bit4 == 0) */
if (state->io_misc_info & (1 << 4))
continue;
diff --git a/src/southbridge/intel/common/usb_debug.c b/src/southbridge/intel/common/usb_debug.c
index f74da65..d87e018 100644
--- a/src/southbridge/intel/common/usb_debug.c
+++ b/src/southbridge/intel/common/usb_debug.c
@@ -30,7 +30,7 @@
if (!IS_ENABLED(CONFIG_HAVE_USBDEBUG_OPTIONS))
return PCI_DEV(0, 0x1d, 7);
- if (hcd_idx==2)
+ if (hcd_idx == 2)
dev = PCI_DEV(0, 0x1a, 0);
else
dev = PCI_DEV(0, 0x1d, 0);
diff --git a/src/southbridge/intel/fsp_bd82x6x/smihandler.c b/src/southbridge/intel/fsp_bd82x6x/smihandler.c
index 394e0a9..83eab79 100644
--- a/src/southbridge/intel/fsp_bd82x6x/smihandler.c
+++ b/src/southbridge/intel/fsp_bd82x6x/smihandler.c
@@ -411,11 +411,11 @@
for (node = 0; node < CONFIG_MAX_CPUS; node++) {
state = smm_get_save_state(node);
- /* Check for Synchronous IO (bit0==1) */
+ /* Check for Synchronous IO (bit0 == 1) */
if (!(state->io_misc_info & (1 << 0)))
continue;
- /* Make sure it was a write (bit4==0) */
+ /* Make sure it was a write (bit4 == 0) */
if (state->io_misc_info & (1 << 4))
continue;
diff --git a/src/southbridge/intel/fsp_i89xx/smihandler.c b/src/southbridge/intel/fsp_i89xx/smihandler.c
index ff76c20..8a6506b 100644
--- a/src/southbridge/intel/fsp_i89xx/smihandler.c
+++ b/src/southbridge/intel/fsp_i89xx/smihandler.c
@@ -411,11 +411,11 @@
for (node = 0; node < CONFIG_MAX_CPUS; node++) {
state = smm_get_save_state(node);
- /* Check for Synchronous IO (bit0==1) */
+ /* Check for Synchronous IO (bit0 == 1) */
if (!(state->io_misc_info & (1 << 0)))
continue;
- /* Make sure it was a write (bit4==0) */
+ /* Make sure it was a write (bit4 == 0) */
if (state->io_misc_info & (1 << 4))
continue;
diff --git a/src/southbridge/intel/ibexpeak/smihandler.c b/src/southbridge/intel/ibexpeak/smihandler.c
index 29c46e8..12a7ac0 100644
--- a/src/southbridge/intel/ibexpeak/smihandler.c
+++ b/src/southbridge/intel/ibexpeak/smihandler.c
@@ -514,11 +514,11 @@
for (node = 0; node < CONFIG_MAX_CPUS; node++) {
state = smm_get_save_state(node);
- /* Check for Synchronous IO (bit0==1) */
+ /* Check for Synchronous IO (bit0 == 1) */
if (!(state->io_misc_info & (1 << 0)))
continue;
- /* Make sure it was a write (bit4==0) */
+ /* Make sure it was a write (bit4 == 0) */
if (state->io_misc_info & (1 << 4))
continue;
diff --git a/src/southbridge/intel/lynxpoint/early_usb.c b/src/southbridge/intel/lynxpoint/early_usb.c
index 8262de8..a64530e 100644
--- a/src/southbridge/intel/lynxpoint/early_usb.c
+++ b/src/southbridge/intel/lynxpoint/early_usb.c
@@ -20,7 +20,7 @@
#include <device/pci_def.h>
#include "pch.h"
-/* HCD_INDEX==2 selects 0:1a.0 (PCH_EHCI2), any other index
+/* HCD_INDEX == 2 selects 0:1a.0 (PCH_EHCI2), any other index
* selects 0:1d.0 (PCH_EHCI1) for usbdebug use.
*/
#if CONFIG_USBDEBUG_HCD_INDEX != 2
diff --git a/src/southbridge/intel/lynxpoint/smihandler.c b/src/southbridge/intel/lynxpoint/smihandler.c
index 37a7a2b..dcec3f0 100644
--- a/src/southbridge/intel/lynxpoint/smihandler.c
+++ b/src/southbridge/intel/lynxpoint/smihandler.c
@@ -221,11 +221,11 @@
for (node = 0; node < CONFIG_MAX_CPUS; node++) {
state = smm_get_save_state(node);
- /* Check for Synchronous IO (bit0==1) */
+ /* Check for Synchronous IO (bit0 == 1) */
if (!(state->io_misc_info & (1 << 0)))
continue;
- /* Make sure it was a write (bit4==0) */
+ /* Make sure it was a write (bit4 == 0) */
if (state->io_misc_info & (1 << 4))
continue;
diff --git a/src/southbridge/nvidia/mcp55/nic.c b/src/southbridge/nvidia/mcp55/nic.c
index be9daf7..788b6ef 100644
--- a/src/southbridge/nvidia/mcp55/nic.c
+++ b/src/southbridge/nvidia/mcp55/nic.c
@@ -42,7 +42,7 @@
write32(base + 0x190, (phy_addr << 5) | (phy_reg));
do {
dword = read32(base + 0x190);
- if (--loop==0)
+ if (--loop == 0)
return -4;
} while ((dword & (1 << 15)));
diff --git a/src/southbridge/sis/sis966/nic.c b/src/southbridge/sis/sis966/nic.c
index 448514b..642d691 100644
--- a/src/southbridge/sis/sis966/nic.c
+++ b/src/southbridge/sis/sis966/nic.c
@@ -150,7 +150,7 @@
mdelay(50);
- if (i==LoopNum) data=0x10000;
+ if (i == LoopNum) data=0x10000;
else {
ulValue=read32(base + 0x3c);
data = ((ulValue & 0xffff0000) >> 16);
diff --git a/src/southbridge/sis/sis966/sis966.c b/src/southbridge/sis/sis966/sis966.c
index 57d6498..d84b373 100644
--- a/src/southbridge/sis/sis966/sis966.c
+++ b/src/southbridge/sis/sis966/sis966.c
@@ -70,7 +70,7 @@
conf = dev->chip_info;
int i;
- if (dev->device==0x0000) {
+ if (dev->device == 0x0000) {
reg = pci_read_config32(dev, PCI_VENDOR_ID);
deviceid = (reg >> 16) & 0xffff;
vendorid = reg & 0xffff;
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ic81601cef841076a7548ccb3bdf0ed1b5420873e
Gerrit-Change-Number: 25853
Gerrit-PatchSet: 1
Gerrit-Owner: Elyes HAOUAS <ehaouas at noos.fr>
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