[coreboot-gerrit] Change in coreboot[master]: soc/amd/stoneyridge: Remove direct AGESA header includes

[Martin Roth (Code Review)]

Martin Roth has uploaded this change for review. ( https://review.coreboot.org/21716


Change subject: soc/amd/stoneyridge: Remove direct AGESA header includes
......................................................................

soc/amd/stoneyridge: Remove direct AGESA header includes

All AGESA headers should be included only through agesawrapper.h

Change-Id: Iadc516e11148048ed9bf43c7a46827793245027a
Signed-off-by: Martin Roth <martinroth at google.com>
---
M src/soc/amd/stoneyridge/dimmSpd.c
M src/soc/amd/stoneyridge/early_setup.c
M src/soc/amd/stoneyridge/imc.c
M src/soc/amd/stoneyridge/include/fchec.h
M src/soc/amd/stoneyridge/northbridge.c
M src/soc/amd/stoneyridge/smbus_spd.c
6 files changed, 7 insertions(+), 23 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/21716/1

diff --git a/src/soc/amd/stoneyridge/dimmSpd.c b/src/soc/amd/stoneyridge/dimmSpd.c
index ace22bb..f306cf9 100644
--- a/src/soc/amd/stoneyridge/dimmSpd.c
+++ b/src/soc/amd/stoneyridge/dimmSpd.c
@@ -16,12 +16,8 @@
 #include <device/pci_def.h>
 #include <device/device.h>
 #include <stdlib.h>
-
-/* warning: Porting.h includes an open #pragma pack(1) */
-#include <Porting.h>
-#include <AGESA.h>
-#include <amdlib.h>
 #include "chip.h"
+#include <agesawrapper.h>
 #include <dimmSpd.h>
 
 AGESA_STATUS AmdMemoryReadSPD(UINT32 unused1, UINTN unused2,
diff --git a/src/soc/amd/stoneyridge/early_setup.c b/src/soc/amd/stoneyridge/early_setup.c
index 5166a7f..cb4183c 100644
--- a/src/soc/amd/stoneyridge/early_setup.c
+++ b/src/soc/amd/stoneyridge/early_setup.c
@@ -23,7 +23,7 @@
 #include <cbmem.h>
 #include <soc/southbridge.h>
 #include <soc/pci_devs.h>
-#include <Fch/Fch.h>
+#include <agesawrapper.h>
 #include <cpu/x86/msr.h>
 #include <delay.h>
 
diff --git a/src/soc/amd/stoneyridge/imc.c b/src/soc/amd/stoneyridge/imc.c
index e7c6fac..d3dc496 100644
--- a/src/soc/amd/stoneyridge/imc.c
+++ b/src/soc/amd/stoneyridge/imc.c
@@ -19,12 +19,7 @@
 #include <arch/io.h>
 #include <device/device.h>
 #include <delay.h>
-#include <Porting.h>
-#include <AGESA.h>
-#include <Lib/amdlib.h>
-#include <Proc/Fch/Common/FchCommonCfg.h>
-#include <Proc/Fch/Fch.h>
-#include <Proc/Fch/FchPlatform.h>
+#include <agesawrapper.h>
 
 #define VACPI_MMIO_VBASE ((u8 *)ACPI_MMIO_BASE)
 
diff --git a/src/soc/amd/stoneyridge/include/fchec.h b/src/soc/amd/stoneyridge/include/fchec.h
index acbc138..3409be9 100644
--- a/src/soc/amd/stoneyridge/include/fchec.h
+++ b/src/soc/amd/stoneyridge/include/fchec.h
@@ -17,9 +17,7 @@
 #define __AMD_STONEY_FCHEC__
 
 #include <soc/imc.h>
-#include "Porting.h"
-#include "AGESA.h"
-#include "FchCommonCfg.h"
+#include <agesawrapper.h>
 
 extern VOID FchECfancontrolservice (IN VOID *FchDataPtr);
 void agesawrapper_fchecfancontrolservice(void);
diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c
index 049bcd0..796a0c9 100644
--- a/src/soc/amd/stoneyridge/northbridge.c
+++ b/src/soc/amd/stoneyridge/northbridge.c
@@ -39,10 +39,7 @@
  * AMD vendorcode files. Place at the end so coreboot defaults and maintained
  * and not set by vendorcode
  */
-#include <AGESA.h>
-#include <FieldAccessors.h>
-#include <Porting.h>
-#include <Topology.h>
+#include <agesawrapper.h>
 
 typedef struct dram_base_mask {
 	u32 base; /* [47:27] at [28:8] */
@@ -532,7 +529,7 @@
 	}
 
 	/* Get max and actual number of cores */
-	pccount = cpuid_ecx(0x80000008);
+	pccount = cpuid_ecx(AMD_CPUID_ASIZE_PCCOUNT);
 	core_max = 1 << ((pccount >> 12) & 0xf);
 	core_nums = (pccount & 0xF);
 
diff --git a/src/soc/amd/stoneyridge/smbus_spd.c b/src/soc/amd/stoneyridge/smbus_spd.c
index 6669ccb..9ec7040 100644
--- a/src/soc/amd/stoneyridge/smbus_spd.c
+++ b/src/soc/amd/stoneyridge/smbus_spd.c
@@ -16,9 +16,7 @@
 #include <device/pci_def.h>
 #include <device/device.h>
 
-/* warning: Porting.h includes an open #pragma pack(1) */
-#include <Porting.h>
-#include <AGESA.h>
+#include <agesawrapper.h>
 #include <amdlib.h>
 #include <soc/southbridge.h>
 #include <dimmSpd.h>

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Iadc516e11148048ed9bf43c7a46827793245027a
Gerrit-Change-Number: 21716
Gerrit-PatchSet: 1
Gerrit-Owner: Martin Roth <martinroth at google.com>
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