[coreboot-gerrit] Change in coreboot[master]: [wip]mainboard/intel/cannonlake_rvp: Add smi support in board

[Lijian Zhao (Code Review)]

Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/21542


Change subject: [wip]mainboard/intel/cannonlake_rvp: Add smi support in board
......................................................................

[wip]mainboard/intel/cannonlake_rvp: Add smi support in board

Change-Id: I8f363e20a6eb92b3c05e16715aa052a8da18b509
Signed-off-by: Lijian Zhao <lijian.zhao at intel.com>
---
M src/mainboard/intel/cannonlake_rvp/Kconfig
M src/mainboard/intel/cannonlake_rvp/Makefile.inc
A src/mainboard/intel/cannonlake_rvp/smihandler.c
3 files changed, 45 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/21542/6

diff --git a/src/mainboard/intel/cannonlake_rvp/Kconfig b/src/mainboard/intel/cannonlake_rvp/Kconfig
index f572f27..3c43d95 100644
--- a/src/mainboard/intel/cannonlake_rvp/Kconfig
+++ b/src/mainboard/intel/cannonlake_rvp/Kconfig
@@ -4,7 +4,9 @@
 	def_bool y
 	select BOARD_ROMSIZE_KB_16384
 	select SOC_INTEL_CANNONLAKE
+	select HAVE_ACPI_RESUME
 	select HAVE_ACPI_TABLES
+	select HAVE_SMI_HANDLER
 	select MAINBOARD_HAS_CHROMEOS
 	select GENERIC_SPD_BIN
 
diff --git a/src/mainboard/intel/cannonlake_rvp/Makefile.inc b/src/mainboard/intel/cannonlake_rvp/Makefile.inc
index 30be699..247f171 100644
--- a/src/mainboard/intel/cannonlake_rvp/Makefile.inc
+++ b/src/mainboard/intel/cannonlake_rvp/Makefile.inc
@@ -25,6 +25,7 @@
 
 ramstage-$(CONFIG_CHROMEOS) += chromeos.c
 
+smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
 subdirs-y += variants/baseboard
 CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include
 
diff --git a/src/mainboard/intel/cannonlake_rvp/smihandler.c b/src/mainboard/intel/cannonlake_rvp/smihandler.c
new file mode 100644
index 0000000..0f05351
--- /dev/null
+++ b/src/mainboard/intel/cannonlake_rvp/smihandler.c
@@ -0,0 +1,42 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2008-2009 coresystems GmbH
+ * Copyright (C) 2017 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/acpi.h>
+#include <arch/io.h>
+#include <console/console.h>
+#include <cpu/x86/smm.h>
+#include <intelblocks/smihandler.h>
+#include <soc/nvs.h>
+
+int mainboard_io_trap_handler(int smif)
+{
+	switch (smif) {
+	case 0x99:
+		printk(BIOS_DEBUG, "Sample\n");
+		smm_get_gnvs()->smif = 0;
+		break;
+	default:
+		return 0;
+	}
+
+	/* On success, the IO Trap Handler returns 0
+	 * On failure, the IO Trap Handler returns a value != 0
+	 *
+	 * For now, we force the return value to 0 and log all traps to
+	 * see what's going on.
+	 */
+	return 1;
+}

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I8f363e20a6eb92b3c05e16715aa052a8da18b509
Gerrit-Change-Number: 21542
Gerrit-PatchSet: 6
Gerrit-Owner: Lijian Zhao <lijian.zhao at intel.com>
Gerrit-Reviewer: AndreX Andraos <andrex.andraos at intel.com>
Gerrit-Reviewer: Bora Guvendik <bora.guvendik at intel.com>
Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein at intel.com>
Gerrit-Reviewer: Krzysztof M Sywula <krzysztof.m.sywula at intel.com>
Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati at intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
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