<p>Lijian Zhao has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/21542">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">[wip]mainboard/intel/cannonlake_rvp: Add smi support in board<br><br>Change-Id: I8f363e20a6eb92b3c05e16715aa052a8da18b509<br>Signed-off-by: Lijian Zhao <lijian.zhao@intel.com><br>---<br>M src/mainboard/intel/cannonlake_rvp/Kconfig<br>M src/mainboard/intel/cannonlake_rvp/Makefile.inc<br>A src/mainboard/intel/cannonlake_rvp/smihandler.c<br>3 files changed, 45 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/21542/6</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/mainboard/intel/cannonlake_rvp/Kconfig b/src/mainboard/intel/cannonlake_rvp/Kconfig<br>index f572f27..3c43d95 100644<br>--- a/src/mainboard/intel/cannonlake_rvp/Kconfig<br>+++ b/src/mainboard/intel/cannonlake_rvp/Kconfig<br>@@ -4,7 +4,9 @@<br>        def_bool y<br>    select BOARD_ROMSIZE_KB_16384<br>         select SOC_INTEL_CANNONLAKE<br>+  select HAVE_ACPI_RESUME<br>       select HAVE_ACPI_TABLES<br>+      select HAVE_SMI_HANDLER<br>       select MAINBOARD_HAS_CHROMEOS<br>         select GENERIC_SPD_BIN<br> <br>diff --git a/src/mainboard/intel/cannonlake_rvp/Makefile.inc b/src/mainboard/intel/cannonlake_rvp/Makefile.inc<br>index 30be699..247f171 100644<br>--- a/src/mainboard/intel/cannonlake_rvp/Makefile.inc<br>+++ b/src/mainboard/intel/cannonlake_rvp/Makefile.inc<br>@@ -25,6 +25,7 @@<br> <br> ramstage-$(CONFIG_CHROMEOS) += chromeos.c<br> <br>+smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c<br> subdirs-y += variants/baseboard<br> CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include<br> <br>diff --git a/src/mainboard/intel/cannonlake_rvp/smihandler.c b/src/mainboard/intel/cannonlake_rvp/smihandler.c<br>new file mode 100644<br>index 0000000..0f05351<br>--- /dev/null<br>+++ b/src/mainboard/intel/cannonlake_rvp/smihandler.c<br>@@ -0,0 +1,42 @@<br>+/*<br>+ * This file is part of the coreboot project.<br>+ *<br>+ * Copyright (C) 2008-2009 coresystems GmbH<br>+ * Copyright (C) 2017 Intel Corp.<br>+ *<br>+ * This program is free software; you can redistribute it and/or modify<br>+ * it under the terms of the GNU General Public License as published by<br>+ * the Free Software Foundation; version 2 of the License.<br>+ *<br>+ * This program is distributed in the hope that it will be useful,<br>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the<br>+ * GNU General Public License for more details.<br>+ */<br>+<br>+#include <arch/acpi.h><br>+#include <arch/io.h><br>+#include <console/console.h><br>+#include <cpu/x86/smm.h><br>+#include <intelblocks/smihandler.h><br>+#include <soc/nvs.h><br>+<br>+int mainboard_io_trap_handler(int smif)<br>+{<br>+ switch (smif) {<br>+      case 0x99:<br>+           printk(BIOS_DEBUG, "Sample\n");<br>+            smm_get_gnvs()->smif = 0;<br>+         break;<br>+       default:<br>+             return 0;<br>+    }<br>+<br>+ /* On success, the IO Trap Handler returns 0<br>+  * On failure, the IO Trap Handler returns a value != 0<br>+       *<br>+    * For now, we force the return value to 0 and log all traps to<br>+       * see what's going on.<br>+   */<br>+  return 1;<br>+}<br></pre><p>To view, visit <a href="https://review.coreboot.org/21542">change 21542</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/21542"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I8f363e20a6eb92b3c05e16715aa052a8da18b509 </div>
<div style="display:none"> Gerrit-Change-Number: 21542 </div>
<div style="display:none"> Gerrit-PatchSet: 6 </div>
<div style="display:none"> Gerrit-Owner: Lijian Zhao <lijian.zhao@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: AndreX Andraos <andrex.andraos@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Bora Guvendik <bora.guvendik@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Krzysztof M Sywula <krzysztof.m.sywula@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> </div>