[coreboot-gerrit] Change in coreboot[master]: soc/intel/braswell: Add USB2 phy setting override

[Matt DeVillier (Code Review)]

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/21372


Change subject: soc/intel/braswell: Add USB2 phy setting override
......................................................................

soc/intel/braswell: Add USB2 phy setting override

Adapted from Chromium commit 9756af8.

Create hook function to override USB2 phy setting from board level.

Original-Change-Id: Ic736dd945f01cf9f24af4ce3bd3f2757abfdeb2e
Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
Original-Tested-by: Keith Tzeng <keith.tzeng at quantatw.com>

Change-Id: If2ac687f6fc44e4c022a72eea7f08cb6385f0380
Signed-off-by: Matt DeVillier <matt.devillier at gmail.com>
---
M src/soc/intel/braswell/chip.c
M src/soc/intel/braswell/include/soc/ramstage.h
2 files changed, 6 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/21372/1

diff --git a/src/soc/intel/braswell/chip.c b/src/soc/intel/braswell/chip.c
index e0c1a51..afa90c3 100644
--- a/src/soc/intel/braswell/chip.c
+++ b/src/soc/intel/braswell/chip.c
@@ -81,6 +81,10 @@
 	}
 }
 
+__attribute__((weak)) void board_silicon_USB2_override(SILICON_INIT_UPD *params)
+{
+}
+
 void soc_silicon_init_params(SILICON_INIT_UPD *params)
 {
 	device_t dev = dev_find_slot(0, PCI_DEVFN(LPC_DEV, LPC_FUNC));
@@ -170,6 +174,7 @@
 	params->I2C5Frequency = config->I2C5Frequency;
 	params->I2C6Frequency = config->I2C6Frequency;
 
+	board_silicon_USB2_override(params);
 }
 
 void soc_display_silicon_init_params(const SILICON_INIT_UPD *old,
diff --git a/src/soc/intel/braswell/include/soc/ramstage.h b/src/soc/intel/braswell/include/soc/ramstage.h
index 8f5f9a5..c566201 100644
--- a/src/soc/intel/braswell/include/soc/ramstage.h
+++ b/src/soc/intel/braswell/include/soc/ramstage.h
@@ -101,6 +101,7 @@
 void southcluster_enable_dev(device_t dev);
 void scc_enable_acpi_mode(device_t dev, int iosf_reg, int nvs_index);
 int SocStepping(void);
+void board_silicon_USB2_override(SILICON_INIT_UPD *params);
 
 extern struct pci_operations soc_pci_ops;
 

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: If2ac687f6fc44e4c022a72eea7f08cb6385f0380
Gerrit-Change-Number: 21372
Gerrit-PatchSet: 1
Gerrit-Owner: Matt DeVillier <matt.devillier at gmail.com>
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