[coreboot-gerrit] Change in coreboot[master]: nb/intel/sandybridge/raminit: Add ECC detection support

[Patrick Rudolph (Code Review)]

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/22214


Change subject: nb/intel/sandybridge/raminit: Add ECC detection support
......................................................................

nb/intel/sandybridge/raminit: Add ECC detection support

Add support for detection ECC capability and forced ECC mode.
Print the ECC mode in verbose debugging mode.

Change-Id: I5b7599746195cfa996a48320404a8dbe6820483a
Signed-off-by: Patrick Rudolph <siro at das-labor.org>
---
M src/northbridge/intel/sandybridge/raminit.c
M src/northbridge/intel/sandybridge/raminit_common.c
M src/northbridge/intel/sandybridge/raminit_common.h
3 files changed, 51 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/22214/1

diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c
index 2dbfeee..8e8c457 100644
--- a/src/northbridge/intel/sandybridge/raminit.c
+++ b/src/northbridge/intel/sandybridge/raminit.c
@@ -398,6 +398,13 @@
 		cpu = cpures.eax;
 		ctrl.sandybridge = IS_SANDY_CPU(cpu);
 
+		/* Get ECC support and mode */
+		ctrl.ecc_supported = get_host_ecc_cap();
+		ctrl.ecc_forced = ctrl.ecc_supported ? get_host_ecc_mode() : 0;
+		printk(BIOS_DEBUG, "ECC supported: %s ECC forced: %s\n",
+				ctrl.ecc_supported ? "yes" : "no",
+				ctrl.ecc_forced ? "yes" : "no");
+
 		/* Get DDR3 SPD data */
 		memset(spds, 0, sizeof(spds));
 		mainboard_get_spd(spds, 0);
@@ -421,6 +428,13 @@
 		cpu = cpures.eax;
 		ctrl.sandybridge = IS_SANDY_CPU(cpu);
 
+		/* Get ECC support and mode */
+		ctrl.ecc_supported = get_host_ecc_cap();
+		ctrl.ecc_forced = ctrl.ecc_supported ? get_host_ecc_mode() : 0;
+		printk(BIOS_DEBUG, "ECC supported: %s ECC forced: %s\n",
+				ctrl.ecc_supported ? "yes" : "no",
+				ctrl.ecc_forced ? "yes" : "no");
+
 		/* Reset DDR3 frequency */
 		dram_find_spds_ddr3(spds, &ctrl);
 
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c
index eaef5f7..00bb513 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.c
+++ b/src/northbridge/intel/sandybridge/raminit_common.c
@@ -463,6 +463,38 @@
 		return cfg->pci_mmio_size;
 }
 
+/*
+ * Returns the ECC capability.
+ * Return 0: ECC isn't supported
+ * Return 1: ECC is supported
+ */
+unsigned int get_host_ecc_cap(void)
+{
+	const struct device *dev = dev_find_slot(0, HOST_BRIDGE);
+	if (!dev)
+		return 0;
+
+	/* read Capabilities A Register */
+	const u32 reg32 = pci_read_config32(PCI_DEV(0, 0, 0), CAPID0_A);
+	return !!(reg32 & (1<<25));
+}
+
+/*
+ * Returns the ECC mode the NB is running at.
+ * Return 0: ECC is optional
+ * Return 1: ECC is enabled and can't be disabled
+ */
+unsigned int get_host_ecc_mode(void)
+{
+	const struct device *dev = dev_find_slot(0, HOST_BRIDGE);
+	if (!dev)
+		return 0;
+
+	/* read Capabilities A Register */
+	const u32 reg32 = pci_read_config32(PCI_DEV(0, 0, 0), CAPID0_A);
+	return !!(reg32 & (1<<24));
+}
+
 void dram_memorymap(ramctr_timing * ctrl, int me_uma_size)
 {
 	u32 reg, val, reclaim;
diff --git a/src/northbridge/intel/sandybridge/raminit_common.h b/src/northbridge/intel/sandybridge/raminit_common.h
index ab6e592..cd8310d 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.h
+++ b/src/northbridge/intel/sandybridge/raminit_common.h
@@ -119,6 +119,8 @@
 	int reg_c14_offset;
 	int reg_320c_range_threshold;
 
+	int ecc_supported;
+	int ecc_forced;
 	int edge_offset[3];
 	int timC_offset[3];
 
@@ -186,4 +188,7 @@
 int try_init_dram_ddr3_ivy(ramctr_timing *ctrl, int fast_boot,
 		int s3_resume, int me_uma_size);
 
+unsigned int get_host_ecc_cap(void);
+unsigned int get_host_ecc_mode(void);
+
 #endif

-- 
To view, visit https://review.coreboot.org/22214
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I5b7599746195cfa996a48320404a8dbe6820483a
Gerrit-Change-Number: 22214
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Rudolph <siro at das-labor.org>
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