[coreboot-gerrit] Change in coreboot[master]: soc/stoneyridge: Remove _PRW ASL

Marc Jones (Code Review) gerrit at coreboot.org
Thu Oct 19 22:59:58 CEST 2017


Marc Jones has uploaded this change for review. ( https://review.coreboot.org/22115


Change subject: soc/stoneyridge: Remove _PRW ASL
......................................................................

soc/stoneyridge: Remove _PRW ASL

Remove _PRW GPE settings from GPP and USB ASL. The mainboard sets
the GPEs.

In addition, Stoney Ridge GPPs don't generate a GPE/SCIs.

Change-Id: Ib6a07a997bc3508109a67867014210091efc0c99
Signed-off-by: Marc Jones <marcj303 at gmail.com>
---
M src/soc/amd/stoneyridge/acpi/northbridge.asl
M src/soc/amd/stoneyridge/acpi/usb.asl
2 files changed, 0 insertions(+), 7 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/22115/1

diff --git a/src/soc/amd/stoneyridge/acpi/northbridge.asl b/src/soc/amd/stoneyridge/acpi/northbridge.asl
index 9cc8ff0..4df6567 100644
--- a/src/soc/amd/stoneyridge/acpi/northbridge.asl
+++ b/src/soc/amd/stoneyridge/acpi/northbridge.asl
@@ -49,7 +49,6 @@
 /* Gpp 0 */
 Device(PBR4) {
 	Name(_ADR, 0x00020001)
-	Name(_PRW, Package() {0x18, 4})
 	Method(_PRT,0) {
 		If(PMOD){ Return(APS4) }	/* APIC mode */
 		Return (PS4)			/* PIC Mode */
@@ -59,7 +58,6 @@
 /* Gpp 1 */
 Device(PBR5) {
 	Name(_ADR, 0x00020002)
-	Name(_PRW, Package() {0x18, 4})
 	Method(_PRT,0) {
 		If(PMOD){ Return(APS5) }	/* APIC mode */
 		Return (PS5)			/* PIC Mode */
@@ -69,7 +67,6 @@
 /* Gpp 2 */
 Device(PBR6) {
 	Name(_ADR, 0x00020003)
-	Name(_PRW, Package() {0x18, 4})
 	Method(_PRT,0) {
 		If(PMOD){ Return(APS6) }	/* APIC mode */
 		Return (PS6)			/* PIC Mode */
@@ -79,7 +76,6 @@
 /* Gpp 3 */
 Device(PBR7) {
 	Name(_ADR, 0x00020004)
-	Name(_PRW, Package() {0x18, 4})
 	Method(_PRT,0) {
 		If(PMOD){ Return(APS7) }	/* APIC mode */
 		Return (PS7)			/* PIC Mode */
@@ -89,7 +85,6 @@
 /* Gpp 4 */
 Device(PBR8) {
 	Name(_ADR, 0x00020005)
-	Name(_PRW, Package() {0x18, 4})
 	Method(_PRT,0) {
 		If(PMOD){ Return(APS8) }	/* APIC mode */
 		Return (PS8)			/* PIC Mode */
diff --git a/src/soc/amd/stoneyridge/acpi/usb.asl b/src/soc/amd/stoneyridge/acpi/usb.asl
index b93555a..3fd76b2 100644
--- a/src/soc/amd/stoneyridge/acpi/usb.asl
+++ b/src/soc/amd/stoneyridge/acpi/usb.asl
@@ -17,12 +17,10 @@
 /* 0:12.0 - EHCI */
 Device(EHC0) {
 	Name(_ADR, 0x00120000)
-	Name(_PRW, Package() {0x0b, 3})
 } /* end EHC0 */
 
 
 /* 0:10.0 - XHCI 0*/
 Device(XHC0) {
 	Name(_ADR, 0x00100000)
-	Name(_PRW, Package() {0x0b, 4})
 } /* end XHC0 */

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ib6a07a997bc3508109a67867014210091efc0c99
Gerrit-Change-Number: 22115
Gerrit-PatchSet: 1
Gerrit-Owner: Marc Jones <marc at marcjonesconsulting.com>
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